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Bug #9261
closedru.ispras.verilog.parser.VerilogIeeeTestCase.runTest_19_03_01_1: line 1:4 mismatched input ')' expecting LPAREN
Start date:
08/31/2018
Due date:
% Done:
100%
Estimated time:
Detected in build:
git
Platform:
Published in build:
0.1.3-beta-201002
Description
ERROR: line 1:0 no viable alternative at input '('
ERROR: line 1:4 mismatched input ')' expecting LPAREN
ERROR: C:\SVN\veritrans\src\test\verilog\ieee-tests\test_19_03_01_1.v line 29:15 missing SEMI at 'g121'
ERROR: line 1:0 no viable alternative at input '('
ERROR: line 1:4 mismatched input ')' expecting LPAREN
ERROR: C:\SVN\veritrans\src\test\verilog\ieee-tests\test_19_03_01_1.v line 30:15 missing SEMI at 'g122'
ERROR: ru\ispras\verilog\parser\grammar\VerilogTreeBuilder.g: node from after line 1:0 mismatched tree node: <unexpected: [@11,0:0='(',<160>,1:0], resync=(> expecting <UP>
ERROR: ru\ispras\verilog\parser\grammar\VerilogTreeBuilder.g: node from after line 1:1 mismatched tree node: AST_STRENGTH expecting <UP>
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