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Task #9811

macro with parameters

Added by Sergey Smolov 19 days ago.

Status:
New
Priority:
Normal
Target version:
Start date:
09/05/2019
Due date:
% Done:

0%

Estimated time:
Detected in build:
master
Published in build:

Description

Macro with parameters are used, for example, in RISC-V cores like picorv32 (see Retrascope for RISC-V).


Related issues

Related to Retrascope RISC-V Benchmark - Bug #9475: Picorv32Hx8kdemoVerilogPrinterTestCase: ERROR: line 1:0 no viable alternative at input '('New02/06/2019

Actions
Related to Verilog Translator - Bug #9261: ru.ispras.verilog.parser.VerilogIeeeTestCase.runTest_19_03_01_1: line 1:4 mismatched input ')' expecting LPARENNew08/31/2018

Actions

History

#1

Updated by Sergey Smolov 18 days ago

  • Related to Bug #9475: Picorv32Hx8kdemoVerilogPrinterTestCase: ERROR: line 1:0 no viable alternative at input '(' added
#2

Updated by Sergey Smolov 18 days ago

  • Related to Bug #9261: ru.ispras.verilog.parser.VerilogIeeeTestCase.runTest_19_03_01_1: line 1:4 mismatched input ')' expecting LPAREN added

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