Task #9811
macro with parameters
Start date:
09/05/2019
Due date:
% Done:
0%
Estimated time:
Detected in build:
master
Published in build:
0.1.3-beta-201002
Description
Macro with parameters are used, for example, in RISC-V cores like picorv32 (see Retrascope for RISC-V).
Related issues
History
Updated by Sergey Smolov over 1 year ago
- Related to Bug #9475: Picorv32Hx8kdemoVerilogPrinterTestCase: ERROR: line 1:0 no viable alternative at input '(' added
Updated by Sergey Smolov over 1 year ago
- Related to Bug #9261: ru.ispras.verilog.parser.VerilogIeeeTestCase.runTest_19_03_01_1: line 1:4 mismatched input ')' expecting LPAREN added
Updated by Alexander Kamkin over 1 year ago
- Assignee changed from Alexander Kamkin to Alexey Danilov
Updated by Sergey Smolov 5 months ago
- Published in build set to 0.1.3-beta-201002
- Status changed from Verified to Closed