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Task #9811

closed

macro with parameters

Added by Sergey Smolov over 4 years ago. Updated about 3 years ago.

Status:
Closed
Priority:
High
Assignee:
Alexey Danilov
Target version:
0.2
Start date:
09/05/2019
Due date:
% Done:

0%

Estimated time:
Detected in build:
master
Published in build:
0.1.3-beta-201002

Description

Macro with parameters are used, for example, in RISC-V cores like picorv32 (see Retrascope for RISC-V).

Related issues 2 (0 open — 2 closed)

Related to Retrascope RISC-V Benchmark - Bug #9475: Picorv32Hx8kdemoVerilogPrinterTestCase: ERROR: line 1:0 no viable alternative at input '('ClosedAlexander Kamkin02/06/2019

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Related to Verilog Translator - Bug #9261: ru.ispras.verilog.parser.VerilogIeeeTestCase.runTest_19_03_01_1: line 1:4 mismatched input ')' expecting LPARENClosedAlexander Kamkin08/31/2018

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 #1

Updated by Sergey Smolov over 4 years ago

  • Related to Bug #9475: Picorv32Hx8kdemoVerilogPrinterTestCase: ERROR: line 1:0 no viable alternative at input '(' added
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 #2

Updated by Sergey Smolov over 4 years ago

  • Related to Bug #9261: ru.ispras.verilog.parser.VerilogIeeeTestCase.runTest_19_03_01_1: line 1:4 mismatched input ')' expecting LPAREN added
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 #3

Updated by Sergey Smolov about 4 years ago

  • Priority changed from Normal to High
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 #4

Updated by Alexander Kamkin about 4 years ago

  • Assignee changed from Alexander Kamkin to Alexey Danilov
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 #5

Updated by Alexey Danilov about 4 years ago

  • Status changed from New to Resolved
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 #6

Updated by Sergey Smolov over 3 years ago

  • Status changed from Resolved to Verified
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 #7

Updated by Sergey Smolov about 3 years ago

  • Status changed from Verified to Closed
  • Published in build set to 0.1.3-beta-201002
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