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RISC-V Instruction Set » History » Version 46

Andrei Tatarnikov, 07/26/2018 06:01 PM

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h1. Instructions supported by MicroTESK for RISC-V
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The table below shows the status of support for particular instructions in MicroTESK for RISC-V.
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Here is the explanation of the meaning of the <code>Specified</code> and <code>Validated</code> columns:
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To be supported in MicroTESK, instructions need to be described in formal specifications. The <code>Specified</code> column shows whether specific instructions have been described in the specifications.
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The instruction semantics described in specifications may be incomplete or invalid. Therefore, instruction specifications must be validated with tests (e.g. ones ported from https://github.com/riscv/riscv-tests). To perform validation, the tests are executed in an ISA simulator constructed on the basis of the specifications. The <code>Validated</code> column shows whether the specifications of specific instructions have been validated with tests.
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NOTE: Incomplete or invalid semantics of instruction in specifications does not that these instructions cannot be used in test programs. It just prevents using them in tests that require information on the current state of registers and memory (e.g. self-checking tests and constraint-based tests). In general, to generate random tests, only the syntax of instructions is required to be valid while the semantics may be incomplete. 
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There are three statuses of support based on the two columns and marked with colors:
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{background:#cfc}. | Fully supported (fully specified and validated) |
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{background:#ff9}. | Partially supported (specified, but not fully validated) |
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{background:#fcc}. | Currently unsupported (not specified and not validated yet) |
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h2. Instruction table
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{font-weight:bold; background:#ddd}. | Instruction Set | Instructions | Specified | Validated |
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{background:#cfc}. | *RV32I (User)* | LUI
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                               AUIPC
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                               JAL
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                               JALR
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                               BEQ
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                               BNE
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                               BLT
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                               BGE
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                               BLTU
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                               BGEU
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                               LB
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                               LH
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                               LW
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                               LBU
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                               LHU
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                               SB
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                               SH
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                               SW
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                               ADDI
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                               SLTI
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                               SLTIU
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                               XORI
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                               ORI
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                               ANDI
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                               SLLI
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                               SRLI
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                               SRAI
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                               SLL
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                               SRL
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                               SRA
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                               ADD
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                               SUB
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                               SLT
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                               SLTU
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                               XOR
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                               OR
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                               AND | Yes (37/37) | Yes (37/37) |
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{background:#cfc}. | *RV64I (User)* | LWU
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                               LD
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                               SD
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                               ADDIW
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                               SLLIW
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                               SRLIW
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                               SRAIW
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                               ADDW
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                               SUBW
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                               SLLW
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                               SRLW
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                               SRAW | Yes (12/12) | Yes (12/12) |
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{background:#ff9}. | *RV32I (System)* | ECALL
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                                        EBREAK
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                                        FENCE
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                                        FENCE.I
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                                        MRET
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                                        SRET
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                                        URET
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                                        WFI
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                                        CSRRW
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                                        CSRRS
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                                        CSRRC
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                                        CSRRWI
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                                        CSRRSI
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                                        CSRRCI | Yes (14/14) | No (0/14) |
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{background:#cfc}. | *RV32M* | MUL
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                               MULH
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                               MULHSU
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                               MULHU
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                               DIV
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                               DIVU
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                               REM
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                               REMU | Yes (8/8) | Yes (8/8) |
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{background:#cfc}. | *RV64M* | MULW
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                               DIVW
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                               DIVUW
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                               REMW
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                               REMUW | Yes (5/5) | Yes (5/5) |
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{background:#cfc}. | *RV32A* | LR.W
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                               SC.W
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                               AMOSWAP.W
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                               AMOADD.W
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                               AMOXOR.W
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                               AMOAND.W
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                               AMOOR.W
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                               AMOMIN.W
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                               AMOMAX.W
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                               AMOMINU.W
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                               AMOMAXU.W | Yes (11/11) | Yes (11/11) |
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{background:#cfc}. | *RV64A* | LR.D
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                               SC.D
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                               AMOSWAP.D
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                               AMOADD.D
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                               AMOXOR.D
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                               AMOAND.D
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                               AMOOR.D
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                               AMOMIN.D
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                               AMOMAX.D
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                               AMOMINU.D
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                               AMOMAXU.D | Yes (11/11) | Yes (11/11) |
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{background:#ff9}. | *RV32F* | FLW
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                               FSW
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                               FMADD.S
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                               FMSUB.S
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                               FNMSUB.S
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                               FNMADD.S
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                               FADD.S
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                               FSUB.S
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                               FMUL.S
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                               FDIV.S
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                               FSQRT.S
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                               FSGNJ.S
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                               FSGNJN.S
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                               FSGNJX.S
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                               FMIN.S
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                               FMAX.S
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                               FCVT.W.S
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                               FCVT.WU.S
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                               FMV.X.W (FMV.X.S)
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                               FEQ.S
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                               FLT.S
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                               FLE.S
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                               FCLASS.S
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                               FCVT.S.W
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                               FCVT.S.WU
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                               FMV.W.X (FMV.S.X) | Yes (26/26) | Partially (8/26)
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                                                                 Including (8): 
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                                                                 FLW
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                                                                 FSW
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                                                                 FEQ_S
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                                                                 FLE_S
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                                                                 FLT_S
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                                                                 FEQ_S
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                                                                 FLE_S
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                                                                 FLT_S |
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{background:#ff9}. | *RV64F* | FCVT.L.S
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                               FCVT.LU.S
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                               FCVT.S.L
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                               FCVT.S.LU | Yes (4/4) | Partially (0/4) |
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{background:#ff9}. | *RV32D* | FLD
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                               FSD
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                               FMADD.D
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                               FMSUB.D
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                               FNMSUB.D
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                               FNMADD.D
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                               FADD.D
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                               FSUB.D
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                               FMUL.D
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                               FDIV.D
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                               FSQRT.D
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                               FSGNJ.D
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                               FSGNJN.D
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                               FSGNJX.D
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                               FMIN.D
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                               FMAX.D
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                               FCVT.S.D
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                               FCVT.D.S
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                               FEQ.D
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                               FLT.D
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                               FLE.D
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                               FCLASS.D
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                               FCVT.W.D
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                               FCVT.WU.D
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                               FCVT.D.W
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                               FCVT.D.WU | Yes (26/26) | Partially (2/26) 
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                                                         Including (2):
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                                                         FLD
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                                                         FSD |
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{background:#ff9}. | *RV64D* | FCVT.L.D
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                               FCVT.LU.D
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                               FMV.X.D
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                               FCVT.D.L
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                               FCVT.D.LU
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                               FMV.D.X   | Yes (6/6) | No (0/6)  |
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{background:#ff9}. | *RVC*   | C.ADDI4SPN
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                               C.FLD
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                               C.LQ
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                               C.LW
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                               C.FLW
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                               C.LD
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                               C.FSD
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                               C.SQ
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                               C.SW
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                               C.FSW
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                               C.SD
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                               C.NOP
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                               C.ADDI
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                               C.JAL
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                               C.ADDIW
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                               C.LI
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                               C.ADDI16SP
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                               C.LUI
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                               C.SRLI
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                               C.SRLI64
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                               C.SRAI
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                               C.SRAI64
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                               C.ANDI
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                               C.SUB
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                               C.XOR
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                               C.OR
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                               C.AND
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                               C.SUBW
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                               C.ADDW
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                               C.J
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                               C.BEQZ
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                               C.BNEZ
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                               C.SLLI
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                               C.SLLI64
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                               C.FLDSP
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                               C.LQSP
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                               C.LWSP
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                               C.FLWSP
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                               C.LDSP
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                               C.JR
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                               C.MV
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                               C.EBREAK
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                               C.JALR
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                               C.ADD
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                               C.FSDSP
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                               C.SQSP
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                               C.SWSP
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                               C.FSWSP
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                               C.SDSP | Yes (49/49) | Partially (36/49)
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                                                      Excluding (13): 
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                                                      C.LQ
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                                                      C.FLW
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                                                      C.SQ
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                                                      C.FSW
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                                                      C.NOP
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                                                      C.SRLI64
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                                                      C.SRAI64
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                                                      C.SLLI64
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                                                      C.LQSP
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                                                      C.FLWSP
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                                                      C.EBREAK
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                                                      C.SQSP
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                                                      C.FSWSP |
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{background:#fcc}. | *RV64Q* | | No | No |
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{background:#fcc}. | *RV32V* | VADD
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                               VSUB
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                               VSL
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                               VSR
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                               VAND
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                               VOR
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                               VXOR
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                               VSEQ
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                               VSNE
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                               VSLT
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                               VSGE
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                               VCLIP
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                               VCVT
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                               VMPOP
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                               VMFIRST
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                               VEXTRACT
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                               VINSERT
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                               VMERGE
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                               VSELECT
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                               VSLIDE
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                               VDIV
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                               VREM
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                               VMUL
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                               VMULH
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                               VMIN
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                               VMAX
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                               VSGNJ
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                               VSGNJN
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                               VSGNJX
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                               VSQRT
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                               VCLASS
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                               VPOPC
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                               VADDI
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                               VSLI
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                               VSRI
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                               VANDI
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                               VORI
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                               VXORI
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                               VCLIPI
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                               VMADD
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                               VMSUB
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                               VNMADD
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                               VNMSUB | No | No |
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{background:#ddd}. | Total |  |   | |