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Andrei Tatarnikov, 07/26/2018 02:59 PM
RISC-V Instruction Set¶
Category | RISC-V (Version 2.2) | MicroTESK | ||
Instructions | Amount | Instructions | Amount | |
Arithmetic Logic Unit | ADDI SLTI SLTIU XLEN ANDI ORI XORI SRLI SLLI LUI AUIPC ADD SUB SLT SLTU AND OR XOR SLL SRL SRA |
21+ | 0+ | |
Branch | JAL JALR BEQ BNE BLT BLTU BGE BGEU BGT BGTU BLE BLEU BLT BLTU BGE BGEU |
16 | 0+ | |
Memory Access | LW LH LHU LB LBU SW SH SB |
8 | 0 | |
System | CSRRW CSRRS CSRRC CSRRWI CSRRSI CSRRCI RDCYCLE RDTIME RDINSTRET |
9 | 0 | |
Other | NOP | 1 | NOP | 1 |
Total: | 65 | 1+ |
100% |
50+% |
0+% |
Instructions supported by MicroTESK for RISC-V¶
Instruction Set | Instructions | Specified | Validated |
RV32I | ? | ? | |
RV64I | ? | ? | |
RV32M | MUL MULH MULHSU MULHU DIV DIVU REM REMU |
Yes (8/8) | Yes (8/8) |
RV64M | MULW DIVW DIVUW REMW REMUW |
Yes (5/5) | Yes (5/5) |
RV32A | LR.W SC.W AMOSWAP.W AMOADD.W AMOXOR.W AMOAND.W AMOOR.W AMOMIN.W AMOMAX.W AMOMINU.W AMOMAXU.W |
Yes (11/11) | Yes (11/11) |
RV64A | LR.D SC.D AMOSWAP.D AMOADD.D AMOXOR.D AMOAND.D AMOOR.D AMOMIN.D AMOMAX.D AMOMINU.D AMOMAXU.D |
Yes (11/11) | Yes (11/11) |
RV32F | FLW FSW FMADD.S FMSUB.S FNMSUB.S FNMADD.S FADD.S FSUB.S FMUL.S FDIV.S FSQRT.S FSGNJ.S FSGNJN.S FSGNJX.S FMIN.S FMAX.S FCVT.W.S FCVT.WU.S FMV.X.W (FMV.X.S) FEQ.S FLT.S FLE.S FCLASS.S FCVT.S.W FCVT.S.WU FMV.W.X (FMV.S.X) |
Yes (26/26) | Partially (?/26) |
RV64F | FCVT.L.S FCVT.LU.S FCVT.S.L FCVT.S.LU |
Yes (4/4) | Partially (?/4) |
RV32D | FLD FSD FMADD.D FMSUB.D FNMSUB.D FNMADD.D FADD.D FSUB.D FMUL.D FDIV.D FSQRT.D FSGNJ.D FSGNJN.D FSGNJX.D FMIN.D FMAX.D FCVT.S.D FCVT.D.S FEQ.D FLT.D FLE.D FCLASS.D FCVT.W.D FCVT.WU.D FCVT.D.W FCVT.D.WU |
Yes (26/26) | Partially (?/26) |
RV64D | FCVT.L.D FCVT.LU.D FMV.X.D FCVT.D.L FCVT.D.LU FMV.D.X |
Yes (6/6) | Partially (?/26) |
Total |
Fully supported |
Partially supported |
Unsupported |
Updated by Andrei Tatarnikov about 6 years ago · 18 revisions