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RISC-V Instruction Set » History » Version 17

Andrei Tatarnikov, 07/26/2018 02:54 PM

1 1 Alexander Protsenko
h1. RISC-V Instruction Set
2
3 6 Andrei Tatarnikov
{font-weight:bold; background:#ddd}. |/2. *Category* |\2. *RISC-V (Version 2.2)* |\2. *MicroTESK* |
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{background:#dde}. | *Instructions* | *Amount* | *Instructions* | *Amount* |
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{background:#fcc}. | Arithmetic Logic Unit | ADDI
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SLTI
7
SLTIU
8
XLEN
9
ANDI
10
ORI
11
XORI
12
SRLI
13
SLLI
14
LUI
15
AUIPC
16
ADD
17
SUB
18
SLT
19
SLTU
20
AND
21
OR
22
XOR
23
SLL
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SRL
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SRA | 21+ |  | 0+ |
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{background:#fcc}. | Branch| JAL
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JALR
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BEQ
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BNE
30
BLT
31
BLTU
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BGE
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BGEU
34
BGT
35
BGTU
36
BLE
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BLEU
38
BLT
39
BLTU
40
BGE
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BGEU | 16 |  | 0+ |
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{background:#ff9}. | Memory Access | LW
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LH
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LHU
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LB
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LBU
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SW
48
SH
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SB | 8 |  | 0 |
50
{background:#fcc}. | System | CSRRW
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CSRRS
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CSRRC
53
CSRRWI
54
CSRRSI
55
CSRRCI
56
RDCYCLE
57
RDTIME
58
RDINSTRET | 9 |  | 0 |
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{background:#cfc}. | Other | NOP | 1 | NOP | 1 |
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{background:#ddd}. | Total: || 65 |  | 1+ |
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{background:#cfc}. |100%|
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{background:#ff9}. |50+%|
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{background:#fcc}. |0+%|
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66
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h1. Instructions supported by MicroTESK for RISC-V
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{font-weight:bold; background:#ddd}. | Instruction Set | Instructions | Specified | Validated |
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| RV32I   |  |  ?  | ?  |
71
| RV64I   |  |  ?  | ?  |
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{background:#cfc}. | *RV32M* | MUL
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          MULH
74
          MULHSU
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          MULHU
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          DIV
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          DIVU
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          REM
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          REMU | Yes (8/8) | Yes (8/8) |
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{background:#cfc}. | *RV64M* | MULW
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          DIVW
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          DIVUW
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          REMW
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          REMUW | Yes (5/5) | Yes (5/5) |
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{background:#cfc}. | *RV32A* | LR.W
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          SC.W
87
          AMOSWAP.W
88
          AMOADD.W
89
          AMOXOR.W
90
          AMOAND.W
91
          AMOOR.W
92
          AMOMIN.W
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          AMOMAX.W
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          AMOMINU.W
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          AMOMAXU.W | Yes (11/11) | Yes (11/11) |
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{background:#cfc}. | *RV64A* | LR.D
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           SC.D
98
           AMOSWAP.D
99
           AMOADD.D
100
           AMOXOR.D
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           AMOAND.D
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           AMOOR.D
103
           AMOMIN.D
104
           AMOMAX.D
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           AMOMINU.D
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           AMOMAXU.D | Yes (11/11) | Yes (11/11) |
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{background:#ff9}. | *RV32F* | FLW
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                               FSW
109
                               FMADD.S
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                               FMSUB.S
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                               FNMSUB.S
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                               FNMADD.S
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                               FADD.S
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                               FSUB.S
115
                               FMUL.S
116
                               FDIV.S
117
                               FSQRT.S
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                               FSGNJ.S
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                               FSGNJN.S
120
                               FSGNJX.S
121
                               FMIN.S
122
                               FMAX.S
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                               FCVT.W.S
124
                               FCVT.WU.S
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                               FMV.X.W (FMV.X.S)
126
                               FEQ.S
127
                               FLT.S
128
                               FLE.S
129
                               FCLASS.S
130
                               FCVT.S.W
131
                               FCVT.S.WU
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                               FMV.W.X (FMV.S.X) | Yes (26/26) | Partially (?/26) |
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{background:#ff9}. | *RV64F* | FCVT.L.S
134
                               FCVT.LU.S
135
                               FCVT.S.L
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                               FCVT.S.LU | Yes (4/4) | Partially (?/4) |
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{background:#ff9}. | *RV32D* | FLD
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                               FSD
139
                               FMADD.D
140
                               FMSUB.D
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                               FNMSUB.D
142
                               FNMADD.D
143
                               FADD.D
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                               FSUB.D
145
                               FMUL.D
146
                               FDIV.D
147
                               FSQRT.D
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                               FSGNJ.D
149
                               FSGNJN.D
150
                               FSGNJX.D
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                               FMIN.D
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                               FMAX.D
153
                               FCVT.S.D
154
                               FCVT.D.S
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                               FEQ.D
156
                               FLT.D
157
                               FLE.D
158
                               FCLASS.D
159
                               FCVT.W.D
160
                               FCVT.WU.D
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                               FCVT.D.W
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                               FCVT.D.WU | Yes (26/26) | Yes (?/26) |
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{background:#ff9}. | RV64D  | FCVT.L.D
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                                                   FCVT.LU.D
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                                                   FMV.X.D
166
                                                   FCVT.D.L
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                                                   FCVT.D.LU
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                                                   FMV.D.X        |   6  | No  |
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{background:#ddd}. | Total |  |   | |
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{background:#cfc}. |  Fully supported |
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{background:#ff9}. |  Partially supported |
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{background:#fcc}. |  Unsupported |