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Task #9310

closed

substitute SMT-LIB variables those names are equal to builtin commands

Added by Sergey Smolov about 6 years ago. Updated over 5 years ago.

Status:
Closed
Priority:
Normal
Assignee:
Sergey Smolov
Category:
Utility
Target version:
1.0
Start date:
10/05/2018
Due date:
% Done:

100%

Estimated time:
Detected in build:
master
Published in build:
1.1.1-beta-190722

Description

Names for variables in HDL designs may be equal to builtin commands of SMT-LIB language (like "select").
When passing constraints to solver, such variables should change their names.

Related issues 1 (0 open — 1 closed)

Related to Retrascope Test Suite - Bug #9309: ru.ispras.retrascope.engine.smv.testbench.sample.vcegar.VcegarPiBusAssertSmvTestbenchTestCase:line 2 column 34: invalid declaration, builtin symbol selectClosedSergey Smolov10/05/2018

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