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Task #9198

closed

Implicit declarations support

Added by Mikhail Lebedev over 5 years ago. Updated over 5 years ago.

Status:
Closed
Priority:
Normal
Assignee:
Alexander Kamkin
Target version:
-
Start date:
08/09/2018
Due date:
% Done:

0%

Estimated time:
Detected in build:
master
Published in build:

Description

Implement implicit declarations of nets and variables (chapter 4.5 of IEEE 1364-2005 Verilog standard).

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