Mikhail Lebedev

Retrascope (Developer, 10/10/2012)
Fortress (Developer, 12/05/2012)
Retrascope RISC-V Benchmark (Developer, 12/19/2018)
Retrascope IDE (Developer, 05/16/2014)
MicroTESK (Developer, 10/16/2017)
Retrascope MC Benchmark (Developer, 03/28/2018)
QEMU4V (Developer, 05/15/2018)

03:51 PM Retrascope MC Benchmark Revision 882c9642: sinlge Verilog design tests for VCEGAR & VIS added: Signed-off-by: Mikhail Lebedev <lebedev@ispras.ru> Mikhail Lebedev
11:53 AM Retrascope MC Benchmark Revision 16d80546: single Verilog design smv-formula printing tests added for Texas-97: Signed-off-by: Mikhail Lebedev <lebedev@ispras.ru> Mikhail Lebedev

12:24 PM Retrascope MC Benchmark Revision 6d4fe400: some PSL spec tests added: Signed-off-by: Mikhail Lebedev <lebedev@ispras.ru> Mikhail Lebedev

02:29 PM Retrascope MC Benchmark Revision 7259a22b: MC bounds added to some tests: Signed-off-by: Mikhail Lebedev <lebedev@ispras.ru> Mikhail Lebedev
02:27 PM Retrascope MC Benchmark Revision 4d4a09a5: VCEGAR modules' properties & spec tests added; test runner debug: Signed-off-by: Mikhail Lebedev <lebedev@ispras.ru> Mikhail Lebedev

12:17 PM Retrascope MC Benchmark Revision a766173e: Test runner with timeout control added, nuXmv-based tests refactored, some comments added: Signed-off-by: Mikhail Lebedev <lebedev@ispras.ru> Mikhail Lebedev

06:07 PM Retrascope Revision c929c5af (retrascope): [smv] model checker class fix: Signed-off-by: Mikhail Lebedev <lebedev@ispras.ru> Mikhail Lebedev
04:54 PM Retrascope Revision dbd5228f (retrascope): [smv] model checker message fix: Signed-off-by: Mikhail Lebedev <lebedev@ispras.ru> Mikhail Lebedev
03:53 PM Retrascope MC Benchmark Revision 4e640a71: some model checking bounds decreased: Signed-off-by: Mikhail Lebedev <lebedev@ispras.ru> Mikhail Lebedev

06:17 PM Retrascope MC Benchmark Revision ab98092b: PSL spec debug: Signed-off-by: Mikhail Lebedev <lebedev@ispras.ru> Mikhail Lebedev

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