Bug #6366
closedsrc/test/vhdl/example/test.vhd: Efsm.UNINITIALISED_STATE isn't supported yet
0%
Description
2015.10.23 14:49:36.729. INFO: Retrascope is starting
2015.10.23 14:49:36.729. INFO: Running: vhdl-parser
2015.10.23 14:49:36.729. INFO: Options: {args=/home/ssedai/projects/retrascope.svn/build/resources/test/example/test.vhd --target vhdl-testbench --toplevel test --engine efsm-test-generator --overwrite-existing --loop-limit 25, vhd=[/home/ssedai/projects/retrascope.svn/build/resources/test/example/test.vhd]}
2015.10.23 14:49:37.164. INFO: Storing: cfg
2015.10.23 14:49:37.165. INFO: Running: cfg-cfginterface-extractor
2015.10.23 14:49:37.165. INFO: Options: {args=/home/ssedai/projects/retrascope.svn/build/resources/test/example/test.vhd --target vhdl-testbench --toplevel test --engine efsm-test-generator --overwrite-existing --loop-limit 25, cfg=<cfg>}
2015.10.23 14:49:37.165. INFO: Storing: cfg-iface
2015.10.23 14:49:37.165. INFO: Running: cfg-cgaa-transformer
2015.10.23 14:49:37.165. INFO: Options: {args=/home/ssedai/projects/retrascope.svn/build/resources/test/example/test.vhd --target vhdl-testbench --toplevel test --engine efsm-test-generator --overwrite-existing --loop-limit 25, cfg=<cfg>}
2015.10.23 14:49:37.165. INFO: Storing: cgaa
2015.10.23 14:49:37.165. INFO: Running: cgaa-efsm-transformer
2015.10.23 14:49:37.165. INFO: Options: {cgaa=<cgaa>, args=/home/ssedai/projects/retrascope.svn/build/resources/test/example/test.vhd --target vhdl-testbench --toplevel test --engine efsm-test-generator --overwrite-existing --loop-limit 25}
2015.10.23 14:49:37.287. INFO: Number of GADD paths: 4
2015.10.23 14:49:37.287. INFO: ======================================
2015.10.23 14:49:37.287. INFO: Clock-like variables: [CLK, RESET].
2015.10.23 14:49:37.287. INFO: Transforming the process of module: TEST.
2015.10.23 14:49:37.287. INFO: 1 states are extracted.
2015.10.23 14:49:37.288. INFO: The state-like variables are: [].
2015.10.23 14:49:37.288. INFO: 2 transitions are extracted.
2015.10.23 14:49:37.288. WARNING: Extra resetting transition has been found: {source state: true; destination state: true; guarded action: {{posedge of CLK}: {true; (EQ RESET 0); (NOT (EQ RESET 1))}->{{C[0:0] := 1}}}}
2015.10.23 14:49:37.289. INFO: 1 EFSM are extracted.
2015.10.23 14:49:37.289. INFO: Storing: efsm
2015.10.23 14:49:37.289. INFO: Running: efsm-test-generator
2015.10.23 14:49:37.289. INFO: Options: {efsm=<efsm>, args=/home/ssedai/projects/retrascope.svn/build/resources/test/example/test.vhd --target vhdl-testbench --toplevel test --engine efsm-test-generator --overwrite-existing --loop-limit 25}
2015.10.23 14:49:37.289. INFO: EFSM.TestGenerator: module TEST: starting test generation
Efsm.UNINITIALISED_STATE isn't supported yet
ru.ispras.retrascope.basis.exception.RetrascopeRuntimeException: Efsm.UNINITIALISED_STATE isn't supported yet
at ru.ispras.retrascope.engine.efsm.simulator.ProcessSimulator.reset(ProcessSimulator.java:167)
at ru.ispras.retrascope.engine.efsm.simulator.ProcessSimulator.<init>(ProcessSimulator.java:108)
at ru.ispras.retrascope.engine.efsm.simulator.ModuleSimulator.<init>(ModuleSimulator.java:79)
at ru.ispras.retrascope.engine.efsm.generator.test.Generator.<init>(Generator.java:75)
at ru.ispras.retrascope.engine.efsm.generator.test.EfsmTestGenerator.start(EfsmTestGenerator.java:117)
at ru.ispras.retrascope.engine.efsm.generator.test.EfsmTestGenerator.start(EfsmTestGenerator.java:43)
at ru.ispras.retrascope.basis.Engine.start(Engine.java:217)
at ru.ispras.retrascope.basis.ToolChain.start(ToolChain.java:110)
at ru.ispras.retrascope.basis.Engine.start(Engine.java:217)
at ru.ispras.retrascope.Retrascope$ToolRun.start(Retrascope.java:199)
at ru.ispras.retrascope.Retrascope.main(Retrascope.java:375)
at ru.ispras.retrascope.Retrascope.main(Retrascope.java:395)
at ru.ispras.retrascope.util.VhdlUtilTest.runRetrascope(VhdlUtilTest.java:169)
at ru.ispras.retrascope.util.VhdlUtilTest.runVhdl(VhdlUtilTest.java:81)
at ru.ispras.retrascope.util.HdlUtilTest.runVhdl(HdlUtilTest.java:97)
at ru.ispras.retrascope.engine.test.printer.testbench.vhdl.TestVhdlTestbenchPrinterVhdlTestCase.generate(TestVhdlTestbenchPrinterVhdlTestCase.java:38)