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Feature #10060

closed

Support SVA properties in CFG model

Added by Sergey Smolov almost 5 years ago. Updated over 1 year ago.

Status:
Closed
Priority:
High
Assignee:
Category:
Model
Target version:
Start date:
01/21/2020
Due date:
% Done:

100%

Estimated time:
Published in build:
1.1.3-beta-230504

Description

Translate SvaAssertionStatement objects of Verilog Translator representation into equivalent CFG objects.

SvaAssertionStatement objects can be of the following kinds:

1. IMMEDIATE - blocking assertions inside processes
2. CONCURRENT - specific processes (ASSERT/ASSUME)

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