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Bug #9276
closedno errors returned for bug-with-macro-containing module
Start date:
09/12/2018
Due date:
% Done:
0%
Estimated time:
Detected in build:
master
Platform:
Published in build:
Description
The Texas'97 'three_processor.v' module has bugs with macro usages (sometimes "MACRO_NAME" is used, not "`MACRO_NAME"), but the Verilog Translator does not return any error.
Run ru.ispras.verilog.parser.VerilogTexas97TestCase.runTest_cache_coherence_three_processor test method.
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