MMU Description¶

A memory management unit (MMU) is known to be one of the most complex and error-prone components of a modern microprocessor. MicroTESK has a special subsystem, called MMU subsystem, intended for (1) specifying memory devices and (2) deriving testing knowledge from such specifications. The subsystem provides unified facilities for describing memory buffers (like L1 and L2 caches, translation look-aside buffers (TLBs), etc.) as well as a means for connecting several buffers into a memory hierarchy.

Address Description¶

A buffer is accessed by an address, which is typically a bit vector of a fixed length (width). Different buffers are allowed to have a common address space (e.g., L1 and L2 are usually both addressed by physical addresses). However, in general case, each buffer has its own domain.

An address space is described using a construct address. Some examples are given below.

address void { width = 0  }
address PA   { width = 40 }

The code above defines two address spaces: (1) a single-element space void and (2) a space PA consisting of 40-bit addresses.

Buffer Description¶

For instance, this is an example of the buffer below:

buffer L1 
{
    sets = 4
    lines = 128
    line = (tag:30 data:256)
    index(addr:PA) = addr<9**8> 
    match(addr:PA) = line.tag == addr<39**10>    
    policy =  lru
}

Description of each constructor in the buffer example is below:

''address''¶

  gives the width of the field occupied in bytes;
  ''address'' has a name; ''PA''(Physical Address) in our case; it also can be virtual (VA);

''buffer''¶

  has a name, ''L1'' in pur example; it can have names ''L2'' and ''TLB'' also;
  ''buffer'' can be described by different parameters, such sets, lines, index, match, policy, and so on, which number is infixed;

''set''¶

  is an associativity of a buffer; it returns the number of lines in a one set;

''lines''¶

  is the number of lines in a given buffer;

''line''¶

  designates the specific line in which the necessary data will be looking for; 
  ''line'' includes its own parameters in the braces: ''tag'' and ''data'', each of them has an appropriate width of the fields kept in bytes;
  in our example ''line'' has only two parameters, but in general case it can include more;

''index''¶

   returns the initial and the final points of the field kept in bytes; they are marked in a three-cornered brackets, after ''addr'';
  ''index'' depends on an ''address'', which is ''physical'' (PA) in our case; the type of an address is set in the braces after ''index''; 

''match''¶

  returns ''true'' or ''false'' depending on if the data required is in the given line or not; 
  it returns ''true'' if there is a ''hit'' in the line, and returns ''false'' otherwise;
  ''match'' description contains the the initial and the final points of the address field in the triangle brackets after ''addr''; 
  as ''index'' in the round braces ''match'' also has the type of the address used; ''PA'' in our case;

''policy''¶

  sets a policy which will be applied to our buffer, ''lru'' (Least Recently Used) in our example;
  policy also can be ''plru'' (Pseudo LRU) and ''fifo'' (First Input First Out).

Code Structure¶

The MMU grammar is in ru.ispras.microtesk.translator.mmu.grammar folder. It contains Lexer, Parser and TreeWalker files. These files can be compiled by build.xml file (microtesk++/build.xml). The files generated (MMULexer.java, MMUParser.java, MMUTreeWalker.java) are in microtesk++.gen.ru.ispras.microtesk.translator.mmu.grammar folder.

The folders ru.ispras.microtesk.translator.mmu.ir.* contain the inner representation of the MMU hierarchy of one buffer.

MMU translator is in the ru.ispras.microtesk.translator.mmu.translator folder.

Files in ru.ispras.microtesk.model.api.mmu folder contain different policies of cache. Folder ru.ispras.microtesk.model.api.mmu.buffer contains the model of MMU - the files which describe Buffer, Set, Line, Address expressions.

After grammar files being generated the file ''BufferExample'' can be loaded to the translator.