MicroTESK » MicroTESK for RISC-V

h1. RISC-V Instruction Set

{font-weight:bold; background:#ddd}. |/2. *Category* |\2. *RISC-V (Version 2.1)* |\2. *MicroTESK* |

{background:#dde}. | *Instructions* | *Amount* | *Instructions* | *Amount* |

{background:#fcc}. | Arithmetic Logic Unit | ADDI

SLTI

SLTIU

XLEN

ANDI

ORI

XORI

SRLI

SLLI

LUI

AUIPC

ADD

SUB

SLT

SLTU

AND

OR

XOR

SLL

SRL

SRA | 21+ |  | 0+ |

{background:#ff9}. | Branch|  | 0+ |  | 0+ |

{background:#ff9}. | Memory Access |  | 0+ |  | 0+ |

{background:#cfc}. | Other | NOP | 1 | NOP | 1 |

{background:#ddd}. | Total: || 0+ |  | 0+ |

{background:#cfc}. |100%|

{background:#ff9}. |50+%|

{background:#fcc}. |0+%|