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Alexander Protsenko, 03/16/2023 02:10 PM
Instruction Set Architecture¶
Data processing - immediate¶
Arithmetic (immediate)¶
- ADD (immediate). Add.
Specification: add, add_32 - SUB (immediate). Subtract.
Specification: sub, sub_32 - ADDS (immediate). Add and set flags.
Specification: adds, adds_32 - SUBS (immediate). Subtract and set flags.
Specification: subs, subs_32 - CMP (immediate). Compare.
Specification: cmp, cmp_32 - CMN (immediate). Compare negative.
Specification: cmn, cmn_32
Logical (immediate)¶
- AND (immediate). Bitwise AND
Specification: and_bitmask, and_bitmask_32 - ANDS (immediate). Bitwise AND and set flags
Specification: ands_bitmask, ands_bitmask_32 - EOR (immediate). Bitwise exclusive OR
Specification: eor_bitmask, eor_bitmask_32 - ORR (immediate). Bitwise inclusive OR
Specification: orr_bitmask, orr_bitmask_32 - TST (immediate). TST Test bits
Specification: tst_bitmask, tst_bitmask_32
Move (wide immediate)¶
- MOVZ. Move wide with zero
Specification: movz, movz_32 - MOVN. Move wide with NOT
Specification: movn, movn_32 - MOVK. Move wide with keep
Specification: movk, movk_32
Move (immediate)¶
- MOV (wide immediate). Move (wide immediate)
Specification: mov_wide_imm, mov_wide_imm_32 - MOV (inverted wide immediate). Move (inverted wide immediate)
Specification: mov_inv_wide_imm, mov_inv_wide_imm_32 - MOV (bitmask immediate). Move (bitmask immediate)
Specification: mov_bitmask, mov_bitmask_32
PC-relative address calculation¶
- ADRP. Compute address of 4KB page at a PC-relative offset
Specification: adrp - ADR. Compute address of label at a PC-relative offset.
Specification: adr
Extract register¶
- EXTR. Extract register from pair
Specification: extr, extr_32
Data processing - register¶
Arithmetic (shifted register)¶
- ADD (shifted register). Add
Specification: add_sh_reg, add_sh_reg_32 - ADDS (shifted register). Add and set flags
Specification: adds_sh_reg, adds_sh_reg_32 - SUB (shifted register). Subtract
Specification: sub_sh_reg, sub_sh_reg_32 - SUBS (shifted register). Subtract and set flags
Specification: subs_sh_reg, subs_sh_reg_32 - CMN (shifted register). Compare negative
Specification: cmn_sh_reg, cmn_sh_reg_32 - CMP (shifted register). Compare
Specification: cmp_sh_reg, cmp_sh_reg_32
Arithmetic (extending register)¶
- ADD (extended register). Add
Specification: add_ex_reg, add_ex_reg_32 - ADDS (extended register). Add and set flags
Specification: adds_ex_reg, adds_ex_reg_32 - SUB (extended register). Subtract
Specification: sub_ex_reg, sub_ex_reg_32 - SUBS (extended register). Subtract and set flags
Specification: subs_ex_reg, subs_ex_reg_32 - CMN (extended register). Compare negative
Specification: cmn_ex_reg, cmn_ex_reg_32 - CMP (extended register). Compare
Specification: cmp_ex_reg, cmp_ex_reg_32
Logical (shifted register)¶
- AND (shifted register). Bitwise AND
Specification: and_bitwise, and_bitwise_32 - ANDS (shifted register). Bitwise AND and set flags
Specification: ands_bitwise, ands_bitwise_32 - BIC (shifted register). Bitwise bit clear
Specification: bic_bitwise, bic_bitwise_32 - BICS (shifted register). Bitwise bit clear and set flags
Specification: bics_bitwise, bics_bitwise_32 - EON (shifted register). Bitwise exclusive OR NOT
Specification: eon_bitwise, eon_bitwise_32 - EOR (shifted register). Bitwise exclusive OR
Specification: eor_bitwise, eor_bitwise_32 - ORR (shifted register). Bitwise inclusive OR
Specification: orr_bitwise, orr_bitwise_32 - MVN. Bitwise NOT
Specification: mvn_bitwise, mvn_bitwise_32 - ORN (shifted register). Bitwise inclusive OR NOT
Specification: orn_bitwise, orn_bitwise_32 - TST (shifted register). Test bits
Specification: tst_bitwise, tst_bitwise_32
Move (register)¶
- MOV (register). Move register
Specification: mov_reg, mov_reg_32 - MOV (to/from SP). Move register to SP or move SP to register
Specification: mov_sp, mov_sp_32
Multiply and divide¶
- MADD. Multiply-add
Specification: madd, madd_32 - MSUB. Multiply-subtract
Specification: msub, msub_32 - MNEG. Multiply-negate
Specification: mneg, mneg_32 - MUL. Multiply
Specification: mul, mul_32 - SMADDL. Signed multiply-add long
Specification: smaddl - SMSUBL. Signed multiply-subtract long
Specification: smsubl - SMNEGL. Signed multiply-negate long
Specification: smnegl - SMULL. Signed multiply long
Specification: smull - SMULH. Signed multiply high
Specification: smulh - UMADDL. Unsigned multiply-add long
Specification: umaddl - UMSUBL. Unsigned multiply-subtract long
Specification: umsubl - UMNEGL. Unsigned multiply-negate long
Specification: umnegl - UMULL. Unsigned multiply long
Specification: umull - UMULH. Unsigned multiply high
Specification: umulh
Divide¶
- SDIV. Signed divide
Specification: sdiv, sdiv_32 - UDIV. Unsigned divide
Specification: udiv, udiv_32
Branches, Exception generating, and System instructions¶
Conditional Branch¶
- B.cond. Branch conditionally
Specification: b - CBNZ. Compare and branch if nonzero
Specification: cbnz, cbnz_32 - CBZ. Compare and branch if zero
Specification: cbz, cbz_32 - TBNZ. Test bit and branch if nonzero
Specification: tbnz - TBZ. Test bit and branch if zero
Specification: tbz
Unconditional branch (immediate)¶
- B. Branch unconditionally
Specification: b_imm - BL. Branch with link
Specification: bl
Unconditional branch (register)¶
- BLR. Branch with link to register
Specification: blr - BR. Branch to register
Specification: br - RET. Return from subroutine
Specification: ret
Exception generation and return¶
Exception generating
- BRK. Breakpoint Instruction
Specification: brk - HLT. Halt Instruction HLT
Specification: hlt - HVC. Generate exception targeting Exception level 2 HVC
Specification: hvc - SMC. Generate exception targeting Exception level 3 SMC
Specification: smc - SVC. Generate exception targeting Exception level 1
Specification: svc
Exception return
- ERET. Exception return using current ELR and SPSR
Specification: eret
Debug state
- DCPS1. Debug switch to Exception level 1 DCPS1
Specification: dcps1 - DCPS2. Debug switch to Exception level 2 DCPS2
Specification: dcps2 - DCPS3. Debug switch to Exception level 3 DCPS3
Specification: dcps3 - DRPS. Debug restore PE state
Specification: drps
System register instructions¶
- MRS. Move System register to general-purpose register MRS
Specification: msr - MSR. Move general-purpose register to System register MSR (register)
Specification: mrs - MSR. Move immediate to PE state field MSR (immediate)
Specification: msr_dc, msr_ds, msr_ss, msr_uao
System instructions¶
- SYS. System instruction
Specification: sys - SYSL. System instruction with result
Specification: sysl - IC. Instruction cache maintenance
Specification: ic, ic_reg - DC. Data cache maintenance
Specification: dc - AT. Address translation
Specification: at - TLBI. TLB Invalidate
Specification: tlbi, tlbi_reg
Hint instructions¶
- NOP. No operation
Specification: nop - YIELD. Yield hint
Specification: yield_op - WFE. Wait for event
Specification: wfe - WFI. Wait for interrupt
Specification: wfi - SEV. Send event
Specification: sev - SEVL. Send event local
Specification: sevl - HINT. Unallocated hint
Specification: hint
Barriers and CLREX instructions¶
- CLREX. Clear Exclusives monitor
Specification: clrex - DMB. Data memory barrier
Specification: dmb - DSB. Data synchronization barrier
Specification: dsb - ISB. Instruction synchronization barrier
Specification: isb
Loads and stores¶
Load/store register¶
[127]: ldr_postindex
[128]: str_postindex
[129]: ldxr
[130]: ldxr_32
[131]: ldxrb_32
[132]: ldxrh_32
[133]: ldxp
[134]: ldxp_32
[135]: stxr
[136]: stxr_32
[137]: stxrb_32
[138]: stxrh_32
[139]: stxp
[140]: stxp_32
[141]: ldar
[142]: ldar_32
[143]: ldarb
[144]: ldarh
[145]: stlr
[146]: stlr_32
[147]: stlrb
[148]: stlrh
[149]: ldaxr
[150]: ldaxr_32
[151]: ldaxrb_32
[152]: ldaxrh_32
[153]: ldaxp
[154]: ldaxp_32
[155]: stlxr
[156]: stlxr_32
[157]: stlxrb_32
[158]: stlxrh_32
[159]: stlxp
[160]: stlxp_32
[200]: psldr
[201]: psldr32
Updated by Alexander Protsenko almost 2 years ago · 17 revisions