MicroTESK

h1. Constraint Solver

The constraint solver subsystem is aimed to provide the possibility to automatically generate test cases based on specified constraints. A constraint is represented by a set of limitations for input values. The solver calculates values of input variables which will violate the limitations if there are any such values.

The subsystem uses an openly distributed SMT solver as an engine (in the current version, we use the Z3 solver by Microsoft Research). In SMT solvers, a special functional language is used to specify constraints. The constraint solver subsystem generates constructions in the SMT language and runs the engine to process them and produce the results (find values of unknown input variables).

h2. Constraints and Satisfiability Modulo Theories (SMT)

A model in SMT is represented by a set of assertions (folmulas) that must be satisfied. An SMT solver checks the satisfiability of the model and suggests a solution (input variable values) that would satisfy the model. In the example below, we specify a model that should help us find values of the rs and rt general purpose registers that will cause the ADD instruction (for a MIPS processor) to raise an integer overflow exception. 

that conditions that   

For example, the script below 

<pre>

(define-sort        Int_t () (_ BitVec 64))

(define-fun      INT_ZERO () Int_t (_ bv0 64))

(define-fun INT_BASE_SIZE () Int_t (_ bv32 64))

(define-fun INT_SIGN_MASK () Int_t (bvshl (bvnot INT_ZERO) INT_BASE_SIZE))

(define-fun IsValidPos ((x!1 Int_t)) Bool (ite (= (bvand x!1 INT_SIGN_MASK) INT_ZERO) true false))

(define-fun IsValidNeg ((x!1 Int_t)) Bool (ite (= (bvand x!1 INT_SIGN_MASK) INT_SIGN_MASK) true false))

(define-fun IsValidSignedInt ((x!1 Int_t)) Bool (ite (or (IsValidPos x!1) (IsValidNeg x!1)) true false))

(declare-const rs Int_t)

(declare-const rt Int_t)

; rt and rs must contain valid sign-extended 32-bit values (bits 63..31 equal)

(assert (IsValidSignedInt rs))

(assert (IsValidSignedInt rt))

; the condition for an overflow: the summation result is not a valid sign-extended 32-bit value

(assert (not (IsValidSignedInt (bvadd rs rt))))

; just in case: rs and rt are not equal (to make the results more interesting)

(assert (not (= rs rt)))

(check-sat)

(echo "Values that lead to an overflow:")

(get-value (rs rt))

</pre>

<pre>

; Finds an integer represented in the form of a bit vector

; that would satisfy the following constraints:

;

; - it lies within the range from 100 to 200

; - it can be represented as a power of two

;

; The value we look for is 128 (or 0x80).

;

; Expected output:

;   sat ((x #x00000080))

(declare-const x (_ BitVec 32))

(assert (bvugt x (_ bv100 32)))

(assert (bvult x (_ bv200 32)))

(assert (= (bvand x (bvsub x (_ bv1 32))) (_ bv0 32)))

(check-sat)

(get-value (x))

(exit)

</pre>

h2. Syntax trees

We use language-independent syntax trees to represent constraints. These trees then are processed to generate a representation that can be understood by a particular SMT solver. The syntax tree contains the following node types:

# Constraint. This is the root node of the tree. It holds the list of unknown variables and the list of limitations for these variables.

# Formula. Represents a limitation expression. Can be combined with other limitations to build a more complex limitation (by applying a logic OR, AND or NOT to it). The underlying expression must be a logic expression that can be solved to true or false.

# Operation. Represents an unary or binary operation with some unknown variable, some value or some expression as parameters.

# Variable.Represents an input variable. It can have an assigned value and, in such case, will be treated as a value. Otherwise, it is an unknown variable. A variable includes a type as an attribute.

# Value. Specifies some known value of the specified type which can be accessed as an attribute.

Note: Operation, Variables and Value can be treated polymorphically as syntax elements (SyntaxElement). This allows combining them to build complex expressions.

The current implementation supports operations with the following data types:

# Bit vectors

# Booleans

h2. Constraint Solver Java Library

The source code files of the Constraint Solver subsystem are located in the "microtesk++/constraint-solver" folder. The java classes are organized in the following packages:

# ru.ispras.microtesk.constraints - contains SMT representation generation logic and solver implementations.

# ru.ispras.microtesk.constraints.syntax - contains classes implementing syntax tree nodes.

# ru.ispras.microtesk.constraints.syntax.types - contains code that specifies particular data types and operation types.

# ru.ispras.microtesk.constraints.tests - contains JUnit test cases.

h1. База данных ограничений

База данных ограничений строится автоматически в результате анализа формализованных спецификаций системы команд микропроцессора, выполненной на одном из ADL-языков (например, nML). Некоторые ситуации могут описываться вручную и добавляться в базу данных ограничений.