Getting Started » History » Revision 3
Revision 2 (Alexander Kamkin, 12/15/2014 03:10 PM) → Revision 3/11 (Alexander Kamkin, 12/15/2014 03:13 PM)
h1. Getting Started {{toc}} h2. Launching Retrascope To run "Retrascope":http://forge.ispras.ru/projects/retrascope, click the _main_ button and wait until a dialog box appears. Do the following: # Choose _Verilog_ Verilog and/or _VHDL_ VHDL _files_ you need to process (use the @Add@ @Add...@ and @Remove@ buttons to compose a list of files). # Select _targets_ you need to create on the base of the chosen HDL descriptions (check / uncheck items in the @Targets@ list). ## Optionally, choose _engines_ you would like to use for your task (check / uncheck items in the @Engines@ list). # Navigate through the engine tabs and specify engine-dependent parameters. # Press the @OK@ button. h2. Target Types | *Target* | *Description* | | @Cfg@ | A set of control flow graphs (CFGs) | | @Cfg Graphml@ | A GraphML file depicting CFGs | | @Cfg Smv@ | An SMV file | | @Cfg Zest@ | A Zest-based visualization of CFGs in IDE | | @Cfg Iface@ | A set of interfaces | | @Cgaa@ | A set of clocked guarded atomic actions (CGAAs) | | @Cgaa Graphml@ | A GraphML file depicting CGAAs | | @Efsm@ | A set of extended finite state machines (EFSMs) | | @Efsm Graphml@ | A GraphML file depicting EFSMs | | @Efsm Zest@ | A Zest-based visualization of EFSMs in IDE | | @Test@ | A set of tests | | @Test Xml@ | An XML-based representation of tests |