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h1. Sim-nML Language Reference
*UNDER CONSTRUCTION*
_~By Andrei Tatarnikov~_
This reference manual describes syntax and semantics of the Sim-nML language. It covers language facilities supported by MicroTESK and does not attempt to be complete. It may differ from documentation provided by other vendors as there are differences in language implementations.
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h2. Introduction
*_Sim-nML_* is an architecture description language (ADL) used in MicroTESK to describe the architecture of a microprocessor under verification. It is a flexible and easy-to-use language based on attribute grammar. Sim-nML was designed to provide a retargetable way to specify microprocessor architecture for various microprocessor-related software tools including instruction-set simulators, assemblers, disassemblers, compiler back-ends etc. It works at the instruction-set level concentrating on behavioral properties and hiding implementation details of the microprocessor. A Sim-nML specification represents a programmer''s model of the microprocessor that covers the following aspects:
* supported data types;
* registers and memory;
* addressing modes;
* syntax and semantics of instructions.
Sim-nML uses a hierarchical tree-like structure to describe an instruction set. Such a structure facilitates grouping related instructions and sharing their common parts. An instruction is described as a path in the tree from the root node to a leaf node. The set of all possible paths represents an instruction set. A node describes a primitive operation responsible for some task within an instruction. Each nodes has certain attributes that can be shared by its descendants. Actions performed by instructions are described as operations with registers and memory represented by bit vectors of arbitrary size.
A specification in Sim-nML starts with definitions of types and constants. For example, a type definition for a 32-bit word looks as follows:
<pre><code>let WORD_SIZE = 32
type word = card(WORD_SIZE)</code></pre>
Type definitions and constants can be used to describe registers and memory. In addition to registers and memory, it is also possible to define temporary variables, internal abstractions provided by Sim-nML to store intermediate results of operations. They do not correspond to any data storage in real hardware and do not save their data across instruction calls. Also, there is often a need to specify some properties of the described model. For this purpose, special constants are used. For example, the code below defines general-purpose registers, memory and a temporary variable. Also, it includes a special constant to establish a correspondence between the general purpose register number 15 and the program counter (PC). Here is the code:
<pre><code>reg GPR[32, word]
mem M[2 ** 20, byte]
var carry[1, bit]
let PC = "GPR[15]"</code></pre>
As stated above, an instruction set is described as a tree of primitive operations. There two kinds of primitives: _operations_ and _addressing modes_. Operations describe parts of instructions responsible for specific tasks and can be used as leaf and root nodes. Addressing modes are aimed to customize operations (for example, they encapsulate rules for accessing microprocessor resources). They can only be used as leaf nodes. For example, here are simplified examples of operation and addressing mode specifications:
<pre><code>mode REG(i: nibble) = R[i]
syntax = format("R%d", i)
image = format("01%4b", i)</code></pre>
<pre><code>op Add()
syntax = "add"
image = "00"
action = { DEST = SRC1 + SRC2; }</code></pre>
Operations and addressing modes have three standard attributes: _syntax_, _image_ and _action_. The first two specify textual and binary syntax. The third describes semantics of the primitive. In addition, addressing modes have a return expression that enables them to be used as variables in various expressions. Attributes can be used by parent primitives referring to a given primitive to describe more complex abstractions.
Primitives are arranged into a tree using production rules. There are two kinds of production rules: _AND rules_ and _OR rules_. AND rules specify parent-child relationships where a child primitive is described as a parameter of its parent. Here is an example of an AND rule:
<pre><code>op arith_inst(act: Add, op1: OPRND, op2: OPRND)</code></pre>
This is the header of the "arith_inst" operation that states that the "arith_inst" operation node has three child nodes: the "act" operation and the "op1" and "op2" addressing modes. The syntax of an operation header is similar to a function where parameter types specify the primitives the rule refers to. Parameter can be, in turn, parameterized with other primitives (they will be encapsulated behind attributes). For this reason child nodes represent independent instances that are accessed from their parent node via parameters. OR rules specify alternatives. This means that a group of primitives is united under some alias so that each of them can used when this alias is specified in an AND rule. An OR rule looks as follows:
<pre><code>op Add_Sub_Mov = Add | Sub | Mov</code></pre>
p=. !Figure1.png!
p=. *Figure 1. Operation tree for the Mov instruction*
h2. Overview of Sim-nML