MMU description » History » Version 27
Alexander Kamkin, 02/19/2013 11:28 AM
1 | 24 | Alexander Kamkin | h1. MMU Description |
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2 | 1 | Taya Sergeeva | |
3 | 27 | Alexander Kamkin | A _memory management unit_ (_MMU_) is known to be one of the most complex and error-prone components of a microprocessor. The MicroTESK tool has a special subsystem, called _MMU description subsystem_, intended for (1) specifying memory devices and (2) deriving testing knowledge from such specifications. |
4 | The subsystem allows specifying microprocessor buffers (caches L1 and L2, translation look-aside buffer (TLB), etc.) in a unified way. Each buffer is described using several parameters: |
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6 | 19 | Taya Sergeeva | For instance, this is an example of the buffer below: |
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8 | 10 | Alexander Kamkin | <pre> |
9 | 2 | Taya Sergeeva | address PA |
10 | { |
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11 | width = 40 |
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12 | } |
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13 | |||
14 | buffer L1 |
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15 | { |
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16 | sets = 4 |
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17 | lines = 128 |
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18 | line = (tag:30 data:256) |
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19 | index(addr:PA) = addr<9**8> |
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20 | match(addr:PA) = line.tag == addr<39**10> |
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21 | policy = lru |
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22 | 10 | Alexander Kamkin | } |
23 | 1 | Taya Sergeeva | </pre> |
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25 | |||
26 | _Description of each constructor_ in the buffer example is below: |
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27 | 19 | Taya Sergeeva | |
28 | h3. ''address'' |
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29 | |||
30 | <pre> |
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31 | gives the width of the field occupied in bytes; |
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32 | ''address'' has a name; ''PA''(Physical Address) in our case; it also can be virtual (VA); |
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33 | </pre> |
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34 | |||
35 | 21 | Taya Sergeeva | h3. ''buffer'' |
36 | |||
37 | <pre> |
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38 | has a name, ''L1'' in pur example; it can have names ''L2'' and ''TLB'' also; |
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39 | ''buffer'' can be described by different parameters, such sets, lines, index, match, policy, and so on, which number is infixed; |
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40 | </pre> |
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41 | 1 | Taya Sergeeva | |
42 | 15 | Taya Sergeeva | h3. ''set'' |
43 | 16 | Taya Sergeeva | |
44 | 15 | Taya Sergeeva | <pre> |
45 | 1 | Taya Sergeeva | is an associativity of a buffer; it returns the number of lines in a one set; |
46 | 15 | Taya Sergeeva | </pre> |
47 | 1 | Taya Sergeeva | |
48 | 15 | Taya Sergeeva | h3. ''lines'' |
49 | 17 | Taya Sergeeva | |
50 | 15 | Taya Sergeeva | <pre> |
51 | 1 | Taya Sergeeva | is the number of lines in a given buffer; |
52 | 15 | Taya Sergeeva | </pre> |
53 | 13 | Taya Sergeeva | |
54 | 15 | Taya Sergeeva | h3. ''line'' |
55 | 17 | Taya Sergeeva | |
56 | 15 | Taya Sergeeva | <pre> |
57 | 1 | Taya Sergeeva | designates the specific line in which the necessary data will be looking for; |
58 | ''line'' includes its own parameters in the braces: ''tag'' and ''data'', each of them has an appropriate width of the fields kept in bytes; |
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59 | in our example ''line'' has only two parameters, but in general case it can include more; |
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60 | 15 | Taya Sergeeva | </pre> |
61 | 14 | Taya Sergeeva | |
62 | 15 | Taya Sergeeva | h3. ''index'' |
63 | 17 | Taya Sergeeva | |
64 | 15 | Taya Sergeeva | <pre> |
65 | 1 | Taya Sergeeva | returns the initial and the final points of the field kept in bytes; they are marked in a three-cornered brackets, after ''addr''; |
66 | 14 | Taya Sergeeva | ''index'' depends on an ''address'', which is ''physical'' (PA) in our case; the type of an address is set in the braces after ''index''; |
67 | 15 | Taya Sergeeva | </pre> |
68 | 1 | Taya Sergeeva | |
69 | 15 | Taya Sergeeva | h3. ''match'' |
70 | 17 | Taya Sergeeva | |
71 | 1 | Taya Sergeeva | <pre> |
72 | 16 | Taya Sergeeva | returns ''true'' or ''false'' depending on if the data required is in the given line or not; |
73 | it returns ''true'' if there is a ''hit'' in the line, and returns ''false'' otherwise; |
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74 | 14 | Taya Sergeeva | ''match'' description contains the the initial and the final points of the address field in the triangle brackets after ''addr''; |
75 | 1 | Taya Sergeeva | as ''index'' in the round braces ''match'' also has the type of the address used; ''PA'' in our case; |
76 | </pre> |
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77 | |||
78 | h3. ''policy'' |
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79 | |||
80 | <pre> |
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81 | sets a policy which will be applied to our buffer, ''lru'' (Least Recently Used) in our example; |
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82 | policy also can be ''plru'' (Pseudo LRU) and ''fifo'' (First Input First Out). |
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83 | </pre> |
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84 | 25 | Alexander Kamkin | |
85 | h2. Code Structure |
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87 | The MMU grammar is in ru.ispras.microtesk.translator.mmu.grammar folder. It contains Lexer, Parser and TreeWalker files. These files can be compiled by build.xml file (microtesk++/build.xml). The files generated (MMULexer.java, MMUParser.java, MMUTreeWalker.java) are in microtesk++.gen.ru.ispras.microtesk.translator.mmu.grammar folder. |
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89 | The folders ru.ispras.microtesk.translator.mmu.ir.* contain the inner representation of the MMU hierarchy of one buffer. |
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91 | MMU translator is in the ru.ispras.microtesk.translator.mmu.translator folder. |
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92 | 1 | Taya Sergeeva | |
93 | Files in ru.ispras.microtesk.model.api.mmu folder contain different policies of cache. Folder ru.ispras.microtesk.model.api.mmu.buffer contains the model of MMU - the files which describe Buffer, Set, Line, Address expressions. |
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94 | 26 | Alexander Kamkin | |
95 | After grammar files being generated the file ''BufferExample'' can be loaded to the translator. |