MicroTESK

h1. Introduction

*_Sim-nML_* is an architecture description language (ADL) used in MicroTESK to describe the architecture of a microprocessor under verification. It is a flexible and easy-to-use language based on attribute grammar. Sim-nML was designed to provide a retargetable way to specify microprocessor architecture for various microprocessor-related software tools including instruction-set simulators, assemblers, disassemblers, compiler back-ends etc. It works at the instruction-set level concentrating on behavioral properties and hiding implementation details of the microprocessor. A Sim-nML specification represents a programmer''s model of the microprocessor that covers the following aspects:

* supported data types;

* registers and memory;

* addressing modes;

* syntax and semantics of instructions.

Sim-nML uses a hierarchical tree-like structure to describe an instruction set. Such a structure facilitates grouping related instructions and sharing their common parts. An instruction is described as a path in the tree from the root node to a leaf node. The set of all possible paths represents an instruction set. A node describes a primitive operation responsible for some task within an instruction. Nodes have attributes that can be shared with their parents. Actions performed by instructions are described as operations with registers and memory represented by bit vectors of arbitrary size.

A specification in Sim-nML starts with definitions of types and constants. For example, a type definition for a 32-bit word looks as follows:

*let* WORD_SIZE = 32

*type* word = card(WORD_SIZE)