Development Milestones » History » Revision 4
Revision 3 (Alexander Kamkin, 04/02/2014 09:14 AM) → Revision 4/9 (Alexander Kamkin, 04/02/2014 10:27 AM)
h1. Development Milestones h2. Version 2 (deadline: 31/08/2014) MicroTESK v2 should fully support instruction set specifications and random/combinatorial template-based test program generation. This is the minimal functionality that makes the MicroTESK tool useful. h3. Version 2.0 (deadline: 30/04/2014) _Keywords_: test situations, exceptions, initialization code, branching instructions * _Test Situations_ ** Manual description of test situations in Java and XML should be supported ** Test situations should be accessible from test templates (corresponding solvers should be invoked, and generated data should be substituted into the test program) ** Each instruction should have a top-level test situation (by default, the top-level situation is @Random@) ** There should be a configuration file assigning top-level test situations to instructions (@Random@, @Zero@, etc.) * _Initialization Code_ ** Manual specification of initialization code (for each access mode) should be supported ** Automated extraction of initialization code (for each access mode) should be implemented * _Exceptions_ ** Mechanism for specifying exceptions should be clarified (probably, a predefined function, like @RaiseException@, should be introduced) ** Means for describing exception handling logic should be added * _Branch Instructions_ ** Facilities for defining/using labels in test templates should be revisited ** Combinatorial test program generation based on test templates with branch instructions should be implemented * _Examples_ ** A test template with branch instructions (combinatorial generation) * _Documentation_ ** All new facilities should be documented h3. Version 2.1 (deadline: 31/05/2014) _Keywords_: VLIW, aliases, self-checking test programs * _Specification_ ** Auxiliary nML constructs, like @alias@, should be enabled ** Mechanisms for calling operations in operations should be implemented ** Means for specifying VLIW architectures (e.g., Elbrus) should be added * _Testing_ ** Mechanisms for calling test templates in test templates should be implemented ** Generation of self-checking test programs should be supported ** Means for writting test templates for VLIW architectures should be added * _Examples_ _Example_ ** A fragment of the Elbrus architecture should specified ** Some test templates for the Elbrus architecture should be written * _Documentation_ ** All new facilities should be documented h3. Version 2.2 (deadline: 30/06/2014) _Keywords_: test situation composition/decomposition/iteration, test coverage extraction * _Test Situation Composition_ # поддержка композиции тестовых ситуаций ** Disjunctive composition of test situations should be supported (random choice of a test situation based on biases) ## дизъюнктивная композиция (случайный выбор на основе весов) ** Conjunctive composition of test situations should be supported (there should possibility to specify hard and soft constraints) ## конъюнктивная композиция (с возможностью указания "жестких" и "мягких" ограничений) * _Test Situation Decomposition_ # поддержка декомпозиции тестовых ситуаций (представление тестовой ситуации в форме дизъюнктивной композиции уточняющих ситуаций - импликантов) ** Means for splitting test situations into disjunctions of implicants should be implemented (BDD-based and other test generation algorithms can be applied): ## например, путем построения BDD: @rule(situation)@ ** The set of decomposition rules should be extensible ## или с помощью других методов генерации тестов для реализаций логических функций * _Test Situation Iteration_ ## набор правил декомпозиции должен быть расширяемым ** Means for iterating test situations should be implemented: @iterate(disjuntive_situation)@, @iterator(rule(situation))@ or @iterate(situation1, situation2, ...)@ # поддержка извлечения тестовых ситуаций из кода * _Test Coverage Extraction_ ## тестовая ситуация верхнего уровня (для отдельной инструкции) строится как дизъюнктивная композиция извлеченных ситуаций ** For each instruction and for each path in its CFG, the corresponding test situation should be constructed ## если в шаблоне для некоторой инструкции не указана тестовая ситуация, по умолчанию используется ситуация верхнего уровня ** For each instruction, the top-level test situation should be constructed as the disjunctive composition of the extracted test situations # поддержка итерации тестовых ситуаций * _Examples_ ** A test situation composition example should be added ** A test situation decomposition example should be added ** A test situation iteration example should be added * _Documentation_ ** All new facilities should be documented ## систематический перебор тестовых ситуаций: @iterate(situation)@ или @iterate(rule(situation))@ h3. Version 2.3 (deadline: 31/08/2014) 31/07/2014) _Keywords_: TestBase, Eclipse, tracing * _TestBase Project_ ** Functions for structuring/composing/decomposing/... test situations should be separated into the # вынесение функций работы с тестовым знанием в проект TestBase project ** Additional test generation facilities should be implemented # создание среды разработки MicroTESK (модуль для Eclipse) * _MicroTESK IDE_ # разработка формата трассы выполнения тестовой программы Promotion. ** An Eclipse plugin should be implemented (including an nML editor, instructions/situations viewers, test template wizards, compiler/generator launchers, etc.) * _Tracing_ ** A trace format should be developed ** Trace utilities should be implemented and integrated into the test program generator * _Documentation_ ** All new facilities should be documented * _Promotion_ ** The miniMIPS microprocessor should be specified ** Test templates for the miniMIPS microprocessor should be written ** The test program generator should be added into the miniMIPS project at OpenCores opencores h2. Version 3 MicroTESK v3 should support microarchitectural specifications and automated test template generation. The tool should be extended to complex multicore microprocessors with cache coherence support. h3. Version 3.0 _Keywords_: memory management, caching, address translation * _Microarchitectural Specifications_ # поддержка микроархитектурных спецификаций ** Specification of memory management units should supported ## спецификация устройства управления памятью ## спецификация конвейера микропроцессора # рефакторинг внутреннего представления ## унификация с проектом Retrascope h3. Version 3.1 _Keywords_: pipelining, microarchitectural networks # поддержка многоядерных микропроцессоров * _Internal Representation_ ** Internal representation should be unified with the Retrascope''s one h3. Version 3.2 _Keywords_: multicore microprocessors, Promela, cache coherence * _Multicore Microprocessors_ ** Integration with Promela specifications should be implemented _To be continued..._ # интеграция с Promela-спецификациями протоколов когерентности