RISC-V Instruction Set » History » Version 9
Andrei Tatarnikov, 05/09/2018 05:13 PM
| 1 | 1 | Alexander Protsenko | h1. RISC-V Instruction Set |
|---|---|---|---|
| 2 | |||
| 3 | 6 | Andrei Tatarnikov | {font-weight:bold; background:#ddd}. |/2. *Category* |\2. *RISC-V (Version 2.2)* |\2. *MicroTESK* | |
| 4 | 2 | Alexander Protsenko | {background:#dde}. | *Instructions* | *Amount* | *Instructions* | *Amount* | |
| 5 | {background:#fcc}. | Arithmetic Logic Unit | ADDI |
||
| 6 | SLTI |
||
| 7 | SLTIU |
||
| 8 | XLEN |
||
| 9 | ANDI |
||
| 10 | ORI |
||
| 11 | XORI |
||
| 12 | SRLI |
||
| 13 | SLLI |
||
| 14 | LUI |
||
| 15 | AUIPC |
||
| 16 | ADD |
||
| 17 | SUB |
||
| 18 | SLT |
||
| 19 | SLTU |
||
| 20 | AND |
||
| 21 | OR |
||
| 22 | XOR |
||
| 23 | SLL |
||
| 24 | SRL |
||
| 25 | SRA | 21+ | | 0+ | |
||
| 26 | 3 | Alexander Protsenko | {background:#fcc}. | Branch| JAL |
| 27 | JALR |
||
| 28 | BEQ |
||
| 29 | BNE |
||
| 30 | BLT |
||
| 31 | BLTU |
||
| 32 | BGE |
||
| 33 | BGEU |
||
| 34 | BGT |
||
| 35 | BGTU |
||
| 36 | BLE |
||
| 37 | BLEU |
||
| 38 | BLT |
||
| 39 | BLTU |
||
| 40 | BGE |
||
| 41 | 4 | Alexander Protsenko | BGEU | 16 | | 0+ | |
| 42 | {background:#ff9}. | Memory Access | LW |
||
| 43 | LH |
||
| 44 | LHU |
||
| 45 | LB |
||
| 46 | LBU |
||
| 47 | SW |
||
| 48 | SH |
||
| 49 | SB | 8 | | 0 | |
||
| 50 | {background:#fcc}. | System | CSRRW |
||
| 51 | CSRRS |
||
| 52 | CSRRC |
||
| 53 | CSRRWI |
||
| 54 | CSRRSI |
||
| 55 | CSRRCI |
||
| 56 | RDCYCLE |
||
| 57 | RDTIME |
||
| 58 | RDINSTRET | 9 | | 0 | |
||
| 59 | 2 | Alexander Protsenko | {background:#cfc}. | Other | NOP | 1 | NOP | 1 | |
| 60 | 5 | Alexander Protsenko | {background:#ddd}. | Total: || 65 | | 1+ | |
| 61 | 1 | Alexander Protsenko | |
| 62 | {background:#cfc}. |100%| |
||
| 63 | {background:#ff9}. |50+%| |
||
| 64 | {background:#fcc}. |0+%| |
||
| 65 | 7 | Andrei Tatarnikov | |
| 66 | |||
| 67 | h1. Instructions supported by MicroTESK for RISC-V |
||
| 68 | |||
| 69 | {font-weight:bold; background:#ddd}. | Instruction Set | Instructions | Amount | |
||
| 70 | | RV32I | | ? | |
||
| 71 | | RV64I | | ? | |
||
| 72 | | RV32M | | ? | |
||
| 73 | | RV64M | | ? | |
||
| 74 | | RV32A | | ? | |
||
| 75 | | RV64A | | ? | |
||
| 76 | 9 | Andrei Tatarnikov | | RV32F | | 26 | |
| 77 | {background:#cfc}. | RV64F | FCVT.L.S |
||
| 78 | FCVT.LU.S |
||
| 79 | FCVT.S.L |
||
| 80 | FCVT.S.LU | 4 | |
||
| 81 | 8 | Andrei Tatarnikov | {background:#cfc}. | RV32D | FLD |
| 82 | FSD |
||
| 83 | FMADD.D |
||
| 84 | FMSUB.D |
||
| 85 | FNMSUB.D |
||
| 86 | FNMADD.D |
||
| 87 | FADD.D |
||
| 88 | FSUB.D |
||
| 89 | FMUL.D |
||
| 90 | FDIV.D |
||
| 91 | FSQRT.D |
||
| 92 | FSGNJ.D |
||
| 93 | FSGNJN.D |
||
| 94 | FSGNJX.D |
||
| 95 | FMIN.D |
||
| 96 | FMAX.D |
||
| 97 | FCVT.S.D |
||
| 98 | FCVT.D.S |
||
| 99 | FEQ.D |
||
| 100 | FLT.D |
||
| 101 | FLE.D |
||
| 102 | FCLASS.D |
||
| 103 | FCVT.W.D |
||
| 104 | FCVT.WU.D |
||
| 105 | FCVT.D.W |
||
| 106 | FCVT.D.WU | 26 | |
||
| 107 | 7 | Andrei Tatarnikov | {background:#cfc}. | RV64D | FCVT.L.D |
| 108 | FCVT.LU.D |
||
| 109 | FMV.X.D |
||
| 110 | FCVT.D.L |
||
| 111 | FCVT.D.LU |
||
| 112 | FMV.D.X | 6 | |
||
| 113 | {background:#ddd}. | Total | | | |
||
| 114 | |||
| 115 | {background:#cfc}. | Fully supported | |
||
| 116 | {background:#ff9}. | Stub implementation | |
||
| 117 | {background:#fcc}. | Unsupported | |