RISC-V Instruction Set » History » Version 41
Andrei Tatarnikov, 07/26/2018 05:41 PM
1 | 7 | Andrei Tatarnikov | h1. Instructions supported by MicroTESK for RISC-V |
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3 | 41 | Andrei Tatarnikov | The table below shows the status of support for particular instructions in MicroTESK for RISC-V. |
4 | 38 | Andrei Tatarnikov | |
5 | There are three stages of support marked with different colors: |
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6 | {background:#cfc}. | Fully supported | |
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7 | {background:#ff9}. | Partially supported | |
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8 | {background:#fcc}. | Currently unsupported | |
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10 | 39 | Andrei Tatarnikov | To be supported in MicroTESK, instructions need to be described in formal specifications. The <code>Specified</code> column shows whether specific instructions were described in the specifications. |
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12 | 40 | Andrei Tatarnikov | The instruction semantics described in specifications may be incomplete or invalid. Therefore, instruction specifications must be validated with tests (e.g. ones ported from https://github.com/riscv/riscv-tests). To perform validation, the tests are executed in an ISA simulator constructed on the basis of the specifications. The <code>Validated</code> column shows whether the specifications of specific instructions were validated with tests. |
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14 | NOTE: Incomplete or invalid semantics of instruction in specifications does not that these instructions cannot be used in test programs. It just prevent using them in tests that require information on the current state of registers and memory (e.g. self-checking tests and constraint-based tests). In general, to generate random tests, only the syntax of instructions is required to be valid whereas the semantics may be incomplete. |
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15 | 39 | Andrei Tatarnikov | |
16 | 11 | Andrei Tatarnikov | {font-weight:bold; background:#ddd}. | Instruction Set | Instructions | Specified | Validated | |
17 | 30 | Andrei Tatarnikov | {background:#cfc}. | *RV32I (User)* | LUI |
18 | 19 | Andrei Tatarnikov | AUIPC |
19 | JAL |
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20 | JALR |
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21 | BEQ |
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22 | BNE |
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23 | BLT |
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24 | BGE |
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25 | BLTU |
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26 | BGEU |
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27 | LB |
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28 | LH |
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29 | LW |
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30 | LBU |
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31 | LHU |
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32 | SB |
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33 | SH |
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34 | SW |
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35 | ADDI |
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36 | SLTI |
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37 | SLTIU |
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38 | XORI |
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39 | ORI |
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40 | ANDI |
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41 | SLLI |
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42 | SRLI |
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43 | SRAI |
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44 | SLL |
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45 | SRL |
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46 | SRA |
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47 | ADD |
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48 | SUB |
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49 | SLT |
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50 | SLTU |
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51 | XOR |
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52 | OR |
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53 | 23 | Andrei Tatarnikov | AND | Yes (37/37) | Yes (37/37) | |
54 | 30 | Andrei Tatarnikov | {background:#cfc}. | *RV64I (User)* | LWU |
55 | 22 | Andrei Tatarnikov | LD |
56 | SD |
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57 | ADDIW |
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58 | SLLIW |
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59 | SRLIW |
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60 | SRAIW |
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61 | ADDW |
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62 | SUBW |
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63 | SLLW |
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64 | 1 | Alexander Protsenko | SRLW |
65 | SRAW | Yes (12/12) | Yes (12/12) | |
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66 | 30 | Andrei Tatarnikov | {background:#ff9}. | *RV32I (System)* | ECALL |
67 | EBREAK |
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68 | FENCE |
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69 | FENCE.I |
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70 | MRET |
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71 | SRET |
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72 | URET |
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73 | WFI |
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74 | CSRRW |
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75 | CSRRS |
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76 | CSRRC |
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77 | CSRRWI |
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78 | CSRRSI |
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79 | 31 | Andrei Tatarnikov | CSRRCI | Yes (14/14) | No (0/14) | |
80 | 15 | Andrei Tatarnikov | {background:#cfc}. | *RV32M* | MUL |
81 | 18 | Andrei Tatarnikov | MULH |
82 | MULHSU |
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83 | MULHU |
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84 | DIV |
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85 | DIVU |
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86 | REM |
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87 | REMU | Yes (8/8) | Yes (8/8) | |
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88 | 15 | Andrei Tatarnikov | {background:#cfc}. | *RV64M* | MULW |
89 | 18 | Andrei Tatarnikov | DIVW |
90 | DIVUW |
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91 | REMW |
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92 | REMUW | Yes (5/5) | Yes (5/5) | |
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93 | 15 | Andrei Tatarnikov | {background:#cfc}. | *RV32A* | LR.W |
94 | 18 | Andrei Tatarnikov | SC.W |
95 | AMOSWAP.W |
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96 | AMOADD.W |
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97 | AMOXOR.W |
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98 | AMOAND.W |
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99 | AMOOR.W |
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100 | AMOMIN.W |
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101 | AMOMAX.W |
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102 | AMOMINU.W |
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103 | AMOMAXU.W | Yes (11/11) | Yes (11/11) | |
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104 | 15 | Andrei Tatarnikov | {background:#cfc}. | *RV64A* | LR.D |
105 | 18 | Andrei Tatarnikov | SC.D |
106 | AMOSWAP.D |
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107 | AMOADD.D |
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108 | AMOXOR.D |
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109 | AMOAND.D |
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110 | AMOOR.D |
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111 | AMOMIN.D |
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112 | AMOMAX.D |
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113 | AMOMINU.D |
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114 | AMOMAXU.D | Yes (11/11) | Yes (11/11) | |
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115 | 15 | Andrei Tatarnikov | {background:#ff9}. | *RV32F* | FLW |
116 | 17 | Andrei Tatarnikov | FSW |
117 | FMADD.S |
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118 | FMSUB.S |
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119 | FNMSUB.S |
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120 | FNMADD.S |
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121 | FADD.S |
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122 | FSUB.S |
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123 | FMUL.S |
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124 | FDIV.S |
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125 | FSQRT.S |
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126 | FSGNJ.S |
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127 | FSGNJN.S |
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128 | FSGNJX.S |
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129 | FMIN.S |
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130 | FMAX.S |
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131 | FCVT.W.S |
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132 | FCVT.WU.S |
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133 | FMV.X.W (FMV.X.S) |
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134 | FEQ.S |
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135 | FLT.S |
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136 | FLE.S |
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137 | FCLASS.S |
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138 | FCVT.S.W |
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139 | FCVT.S.WU |
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140 | 35 | Andrei Tatarnikov | FMV.W.X (FMV.S.X) | Yes (26/26) | Partially (8/26) |
141 | 36 | Andrei Tatarnikov | Including (8): |
142 | 35 | Andrei Tatarnikov | FLW |
143 | FSW |
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144 | FEQ_S |
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145 | FLE_S |
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146 | FLT_S |
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147 | FEQ_S |
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148 | FLE_S |
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149 | FLT_S | |
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150 | 17 | Andrei Tatarnikov | {background:#ff9}. | *RV64F* | FCVT.L.S |
151 | FCVT.LU.S |
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152 | FCVT.S.L |
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153 | 36 | Andrei Tatarnikov | FCVT.S.LU | Yes (4/4) | Partially (0/4) | |
154 | 17 | Andrei Tatarnikov | {background:#ff9}. | *RV32D* | FLD |
155 | FSD |
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156 | FMADD.D |
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157 | FMSUB.D |
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158 | FNMSUB.D |
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159 | FNMADD.D |
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160 | FADD.D |
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161 | FSUB.D |
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162 | FMUL.D |
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163 | FDIV.D |
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164 | FSQRT.D |
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165 | FSGNJ.D |
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166 | FSGNJN.D |
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167 | FSGNJX.D |
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168 | FMIN.D |
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169 | FMAX.D |
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170 | FCVT.S.D |
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171 | FCVT.D.S |
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172 | FEQ.D |
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173 | FLT.D |
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174 | FLE.D |
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175 | FCLASS.D |
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176 | FCVT.W.D |
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177 | 1 | Alexander Protsenko | FCVT.WU.D |
178 | FCVT.D.W |
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179 | 36 | Andrei Tatarnikov | FCVT.D.WU | Yes (26/26) | Partially (2/26) |
180 | Including (2): |
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181 | FLD |
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182 | FSD | |
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183 | 18 | Andrei Tatarnikov | {background:#ff9}. | *RV64D* | FCVT.L.D |
184 | 1 | Alexander Protsenko | FCVT.LU.D |
185 | 18 | Andrei Tatarnikov | FMV.X.D |
186 | FCVT.D.L |
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187 | FCVT.D.LU |
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188 | 36 | Andrei Tatarnikov | FMV.D.X | Yes (6/6) | No (0/6) | |
189 | 28 | Andrei Tatarnikov | {background:#ff9}. | *RVC* | C.ADDI4SPN |
190 | C.FLD |
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191 | C.LQ |
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192 | C.LW |
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193 | C.FLW |
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194 | C.LD |
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195 | C.FSD |
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196 | C.SQ |
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197 | C.SW |
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198 | C.FSW |
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199 | C.SD |
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200 | C.NOP |
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201 | C.ADDI |
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202 | C.JAL |
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203 | C.ADDIW |
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204 | C.LI |
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205 | C.ADDI16SP |
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206 | C.LUI |
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207 | C.SRLI |
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208 | C.SRLI64 |
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209 | C.SRAI |
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210 | C.SRAI64 |
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211 | C.ANDI |
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212 | C.SUB |
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213 | C.XOR |
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214 | C.OR |
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215 | C.AND |
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216 | C.SUBW |
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217 | C.ADDW |
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218 | C.J |
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219 | C.BEQZ |
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220 | C.BNEZ |
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221 | C.SLLI |
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222 | C.SLLI64 |
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223 | C.FLDSP |
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224 | C.LQSP |
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225 | C.LWSP |
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226 | C.FLWSP |
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227 | C.LDSP |
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228 | C.JR |
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229 | C.MV |
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230 | C.EBREAK |
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231 | C.JALR |
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232 | C.ADD |
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233 | C.FSDSP |
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234 | C.SQSP |
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235 | C.SWSP |
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236 | C.FSWSP |
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237 | C.SDSP | Yes (49/49) | Partially (36/49) |
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238 | 32 | Andrei Tatarnikov | Excluding (13): |
239 | C.LQ |
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240 | C.FLW |
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241 | C.SQ |
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242 | C.FSW |
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243 | C.NOP |
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244 | C.SRLI64 |
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245 | C.SRAI64 |
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246 | C.SLLI64 |
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247 | C.LQSP |
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248 | C.FLWSP |
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249 | C.EBREAK |
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250 | C.SQSP |
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251 | C.FSWSP | |
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252 | 34 | Andrei Tatarnikov | {background:#fcc}. | *RV64Q* | | No | No | |
253 | 33 | Andrei Tatarnikov | {background:#fcc}. | *RV32V* | VADD |
254 | VSUB |
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255 | VSL |
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256 | VSR |
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257 | VAND |
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258 | VOR |
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259 | VXOR |
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260 | VSEQ |
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261 | VSNE |
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262 | VSLT |
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263 | VSGE |
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264 | VCLIP |
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265 | VCVT |
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266 | VMPOP |
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267 | VMFIRST |
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268 | VEXTRACT |
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269 | VINSERT |
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270 | VMERGE |
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271 | VSELECT |
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272 | VSLIDE |
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273 | VDIV |
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274 | VREM |
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275 | VMUL |
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276 | VMULH |
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277 | VMIN |
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278 | VMAX |
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279 | VSGNJ |
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280 | VSGNJN |
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281 | VSGNJX |
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282 | VSQRT |
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283 | VCLASS |
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284 | VPOPC |
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285 | VADDI |
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286 | VSLI |
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287 | VSRI |
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288 | VANDI |
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289 | VORI |
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290 | VXORI |
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291 | VCLIPI |
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292 | 10 | Andrei Tatarnikov | VMADD |
293 | 7 | Andrei Tatarnikov | VMSUB |
294 | 37 | Andrei Tatarnikov | VNMADD |
295 | VNMSUB | No | No | |
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296 | {background:#ddd}. | Total | | | | |