PowerPC Instruction Set » History » Revision 2
Revision 1 (Alexander Protsenko, 10/24/2016 07:19 PM) → Revision 2/6 (Alexander Protsenko, 10/24/2016 07:20 PM)
h1. PowerPC instruction set
{font-weight:bold; background:#ddd}. | *сategory* | *instructions* | *amount* |
{background:#cfc}. | Arithmetic Logic Unit | add RT,RA,RB | 1 |
{background:#fcc}. | Shifter | SLL rd,rt,sa | 6 |
{background:#fcc}. | Multiply| MULT rs,rt | 8 |
{background:#ff9}. | Branch| B
J target | 16 |
{background:#fcc}. | Memory Access |
LW rt,offset(rs)
SW rt,offset(rs) | 8 |
{background:#ddd}. | Total: || 300+ 1+ |
{background:#cfc}. |100%|
{background:#ff9}. |50+%|
{background:#fcc}. |0+%|