Open-Source Projects

What's new?

• Tool Functions: Updated the MicroTESK core to 2.5.0
• Test and Debug: Used QEMU4V 0.3.4 for running tests

Download: https://forge.ispras.ru/projects/microtesk-mips64/files

What's new?

• Tool Functions: Updated the MicroTESK core to 2.5.0
• Binary Samples: Added binaries samples w/ their C sources (see the arch/riscv/binaries directory)
• Test and Debug: Used QEMU4V 0.3.4 for running tests

Download: https://forge.ispras.ru/projects/microtesk-riscv/files

MicroTESK for RISC-V 0.0.* distribution packages have been re-uploaded to https://forge.ispras.ru/projects/microtesk-riscv/files w/ the build base version having been set.

What's new?

• Introduced new internal representation, so-called MIR (Middle-level [or MicroTESK] IR)
  • Redesigned the constraint generator (for mark-based situations)
  • Redesigned the symbolic executor (for binary code analysis)
• Unified the directives (alignment, data definition, and labels) for .text and .data sections:
  • Enabled a possibility to define data in .text
  • Implemented new directives: .balign, .p2align, and .option
  • Refactored the code/data allocation logic
• Implemented a simple instruction-level coverage tracker (experimental)
  • Introduced a new option --coverage-log for tracking test coverage
  • Enabled a possibility to generate test coverage reports in Aspectrace format (see https://forge.ispras.ru/projects/aspectrace)
• Used the QEMU4V 0.3.4 simulator for running tests

Download: http://forge.ispras.ru/projects/microtesk/files

• General improvements

The source code can be downloaded from here

• The project has been updated from Java 8.0 to Java 11.0.5.
• Gradle has been updated from 4.10.3 to 5.0.

The library can be downloaded from here:
https://forge.ispras.ru/projects/aspectrace/files

• The project has been updated from Java 8.0 to Java 11.0.5.
• Gradle has been updated from 4.10.3 to 5.0.

The library can be downloaded from here:
https://forge.ispras.ru/projects/aspectrace/files

What's new?

• Specifications: Added the system registers and the related modes
• Specifications: Added sample specifications of some vector instructions (consistent with RISC-V "V" Vector Extension Version 0.7.1)
• Specifications: Fixed bugs in the RV64A instructions
• Specifications: Fixed bugs in the RV32{F,D} instructions (FEQ, FLE, and FLT)
• Test Templates: Added sample test templates for vector instructions
• Test Templates: Changed the structure of directories
• Test Templates: Fixed the Torture-like template (synthetics/rvxxx)
• Tool Functions: Moved the branch data generators to TestBase
• Test and Debug: Used QEMU4V 0.3.3 for running tests

Download: https://forge.ispras.ru/projects/microtesk-riscv/files

What's new?

• Updated the TestBase library
• Used the QEMU4V 0.3.3 simulator for running tests

Download: http://forge.ispras.ru/projects/microtesk/files

The new release is based on QEMU 4.1.0 and includes the following changes:

• Gradle 4.10.3 is used for project building
• Bug fixes and general improvements

The source code can be downloaded from here