MicroTESK for RISC-V 0.0.9 released
MicroTESK for RISC-V 0.0.9 has been released.
What's new?
- Specifications: Added the system registers and the related modes
- Specifications: Added sample specifications of some vector instructions (consistent with
RISC-V "V" Vector Extension Version 0.7.1
) - Specifications: Fixed bugs in the
RV64A
instructions - Specifications: Fixed bugs in the
RV32{F,D}
instructions (FEQ
,FLE
, andFLT
) - Test Templates: Added sample test templates for vector instructions
- Test Templates: Changed the structure of directories
- Test Templates: Fixed the Torture-like template (
synthetics/rvxxx
) - Tool Functions: Moved the branch data generators to TestBase
- Test and Debug: Used QEMU4V 0.3.3 for running tests
Download: https://forge.ispras.ru/projects/microtesk-riscv/files
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