Task #2765
Updated by Alexander Kamkin almost 12 years ago
Each design's variable (reg or net) should be annotated with clocks synchronizing the usage and definition of the variable. A solution should be suggested (documentation in wiki + IG-based implementation).
h3. Some Ideas
use_clk(var) = union { clk | always(clk) where var is used (transitively via data dependencies) } union { use_clk(lhs) | assign lhs = f(..., var, ...) }
def_clk(var) = union { clk | always(clk) where var is defined } union { def_clk(rhs) | assign var = f(..., rhs, ...) }