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# Project Tracker Status Priority Subject Author Assignee Target version
10512 Verilog Translator Bug New Normal ADDA162H90A_atop.v line 120:47 mismatched input ':' expecting RPAREN Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9670 Retrascope Test Suite Task New High add 'ar.v' module to the test suite when SVA support will be implemented Sergey Smolov Sergey Smolov Actions
5504 Retrascope Task New Normal add channels between EFSMs Sergey Smolov Mikhail Lebedev Retrascope - 1.2 Actions
9477 Retrascope RISC-V Benchmark Bug New Normal an "import "DPI-C" function" construction causes Verilog Translator error Sergey Smolov Alexander Kamkin Actions
9488 Retrascope Task New Normal CFG-GADD transformer backend that makes assignments index and range-free Sergey Smolov Sergey Smolov Retrascope - 1.2 Actions
9986 QEMU4V Task New Normal check if QEMU4V features can be implemented as TCG plugin Sergey Smolov Sergey Smolov QEMU4V - 0.3 Actions
9888 Retrascope IDE Task New Normal complete migration from Ant to Gradle build system Sergey Smolov Retrascope IDE - 0.1 Actions
10069 MicroTESK Bug New Normal cpu.nml Error: Internal error: context [/Isa] 1:8 attribute file isn't defined Sergey Smolov Alexander Kamkin MicroTESK - 2.5 Actions
10304 MicroTESK Task New Normal deprecation warnings via compilation Sergey Smolov Alexander Kamkin MicroTESK - 2.5 Actions
6988 Retrascope IDE Task New Normal [efsm][visualizator][zest] "organic" layout for EFSM models Sergey Smolov Maxim Chudnov Retrascope IDE - 0.1 Actions
10509 Verilog Translator Bug New Normal ERROR: [Internal] 0 must be > 0 Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
10505 Verilog Translator Bug New Normal ERROR: [Internal] 11 must be within range [0, 1) Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
10510 Verilog Translator Bug New Normal ERROR: [Internal] Bit vector sizes do not match: 32 != 2. Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
10508 Verilog Translator Bug New Normal ERROR: [Internal] Java heap space Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9478 Retrascope RISC-V Benchmark Bug New Normal ERROR: retrascope-riscv\src\main\verilog\rocket-chip\src\main\resources\vsrc\TestDriver.v line 28:2 no viable alternative at input 'int' Sergey Smolov Actions
10215 Verilog Translator Bug New Normal ERROR: Starting points limit has been exhausted: 2255 Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9184 Veritool Bug New Normal ERROR: Unable to read config file: /usr/lib/x86_64-linux-gnu/ivl/veritool.conf Sergey Smolov Actions
9790 Verilog Translator Task New Normal external names for unnamed generate blocks Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9377 MicroTESK for MIPS Bug New Normal 'Failed to construct decoder' warnings in project's build log Sergey Smolov Alexander Kamkin Actions
8982 Verilog Translator Task New Normal "for" loop unrolling Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9810 Retrascope IDE Task New Normal Gradle build system Sergey Smolov Maxim Chudnov Retrascope IDE - 0.1 Actions
9993 Verilog Translator Bug New High if two modules are passed to the tool and one includes another, the tool hangs Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9901 Retrascope Test Suite Bug New Low initializationError in some tests after Jenkins update Sergey Smolov Mikhail Lebedev Actions
7561 Fortress Task New Normal ISampleConstraint: 'getExpectedVariables' returns value that is ignored in jUnit tests Sergey Smolov Andrei Tatarnikov Fortress - 0.4 Actions
8587 MicroTESK Feature New Normal ISA subsets Sergey Smolov Artem Kotsynyak MicroTESK - 2.5 Actions
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