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# Project Tracker Status Priority Subject Author Assignee Target version
9902 Verilog Translator Bug New High java.lang.IllegalArgumentException: Descriptor for 'dma_chsel.arb_chcsr_reg' has not been found Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9859 Verilog Translator Task New Normal modify "ERROR: [Internal] null" line at error log Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9822 Verilog Translator Bug New Normal ru.ispras.verilog.parser.VerilogIeeeTestCase.runTest_10_04_04_1: Starting points limit has been exhausted: 513 Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9790 Verilog Translator Task New Normal external names for unnamed generate blocks Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9478 Retrascope RISC-V Benchmark Bug New Normal ru.ispras.verilog.parser.sample.RocketChipTestDriverVerilogPrinterTestCase: mismatched input 'unsigned' expecting LPAREN Sergey Smolov Alexander Kamkin Actions
9477 Retrascope RISC-V Benchmark Bug New Normal an "import "DPI-C" function" construction causes Verilog Translator error Sergey Smolov Alexander Kamkin Actions
9475 Retrascope RISC-V Benchmark Bug New Normal Picorv32Hx8kdemoVerilogPrinterTestCase: ERROR: line 1:0 no viable alternative at input '(' Sergey Smolov Alexander Kamkin Actions
9377 MicroTESK for MIPS64 Bug New Normal 'Failed to construct decoder' warnings in project's build log Sergey Smolov Alexander Kamkin Actions
9376 MicroTESK for MIPS64 Bug New Normal Warning: Group MIPS64FpuOp contains two items add_fmt and mfc1 with the same opcode 01000100000000000000000000000000 Sergey Smolov Alexander Kamkin Actions
9276 Verilog Translator Bug New Normal no errors returned for bug-with-macro-containing module Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
8982 Verilog Translator Task New Normal "for" loop unrolling Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9892 MicroTESK for RISC-V Bug New Normal WARNING: An illegal reflective access operation has occurred Sergey Smolov Alexander Protsenko Actions
9962 Verilog Translator Bug New High ru.ispras.verilog.parser.sample.Mips16CoreTopTestCase: java.lang.IllegalArgumentException Sergey Smolov Alexey Danilov Verilog Translator - 0.1 Actions
6394 Local Support Project Bug New Normal Проект HDL Retrascope: на 17-дюймовом мониторе не масштабируется таблица Задачи Sergey Smolov Alexey Demakov Actions
2494 CTESK Bug New Normal warning at build log Sergey Smolov Alexey Demakov Actions
8587 MicroTESK Feature New Normal ISA subsets Sergey Smolov Andrei Tatarnikov Actions
7564 MicroTESK Task New Normal "How to build MicroTESK" guide for developers in project Wiki Sergey Smolov Andrei Tatarnikov Actions
7561 Fortress Task New Normal ISampleConstraint: 'getExpectedVariables' returns value that is ignored in jUnit tests Sergey Smolov Andrei Tatarnikov Fortress - 0.4 Actions
6423 Fortress Task New Low to_real, to_int, is_int operations Sergey Smolov Andrei Tatarnikov Fortress - 0.4 Actions
5966 MicroTESK Bug New Normal mark shell scripts as executable in the distribution tar.gz archive Sergey Smolov Andrei Tatarnikov MicroTESK - 2.2 Actions
4713 Fortress Task New High SMT-LIB structures Sergey Smolov Artem Kotsynyak Fortress - 0.4 Actions
4674 TestBase Task New Normal Тестовые ситуации Sergey Smolov Artem Kotsynyak TestBase - 0.0 Actions
9911 Retrascope Task New Normal merge "*/sample/*TestCase" Java test cases Sergey Smolov Maxim Chudnov Retrascope - 1.0 Actions
9816 Retrascope IDE Bug New Normal Retrascope IDE does not appear in "Installed Software" menu Sergey Smolov Maxim Chudnov Retrascope IDE - 0.1 Actions
9815 Retrascope IDE Task New Normal uninstaller for Retrascope IDE Sergey Smolov Maxim Chudnov Retrascope IDE - 0.1 Actions
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