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# Project Tracker Status Priority Subject Author Assignee Target version
10075 Retrascope Bug New Normal jython.jar: WARNING: An illegal reflective access operation has occurred at JDK 11 Sergey Smolov Sergey Smolov Retrascope - 1.1 Actions
10074 MicroTESK Feature New Normal option that stores boot obj at the generated ld script Sergey Smolov Alexander Kamkin MicroTESK - 2.5 Actions
10073 Retrascope Task New Normal fix checkstyle warnings Sergey Smolov Maxim Chudnov Retrascope - 1.1 Actions
10069 MicroTESK Bug New Normal cpu.nml Error: Internal error: context [/Isa] 1:8 attribute file isn't defined Sergey Smolov Alexander Kamkin MicroTESK - 2.5 Actions
10060 Retrascope Feature New Normal Support SVA properties in CFG model Sergey Smolov Sergey Smolov Retrascope - 1.2 Actions
10059 Retrascope Task New Normal mv all the project tests to JUnit 5 platform Sergey Smolov Maxim Chudnov Retrascope - 1.2 Actions
10058 Retrascope Task New Normal User documentation Sergey Smolov Sergey Smolov Retrascope - 1.2 Actions
10041 QEMU4V Bug Closed Normal wrong names for PowerPC registers in trace Sergey Smolov Sergey Smolov QEMU4V - 0.3 Actions
10031 MicroTESK for PowerPC Bug New Normal WARNING: An illegal reflective access operation has occurred Sergey Smolov Alexander Protsenko MicroTESK for PowerPC - 0.0 Actions
10023 Retrascope Bug Verified High ru.ispras.retrascope.parser.verilog.VerilogParserTestCase: java.lang.Exception: Method runTest should have no parameters Sergey Smolov Maxim Chudnov Retrascope - 1.2 Actions
10018 Trace Matcher Task Closed Normal migrate to Python 3 Sergey Smolov Sergey Smolov Trace Matcher - 0.1 Actions
10017 Trace Matcher Task Closed Normal README\ChangeLog -> README.md\ChangeLog.md Sergey Smolov Sergey Smolov Trace Matcher - 0.1 Actions
10016 Trace Matcher Task Closed Normal Use Gradle 4.10.3 in build system Sergey Smolov Sergey Smolov Trace Matcher - 0.1 Actions
10015 Trace Matcher Feature Closed Normal Report an error when input file is empty Sergey Smolov Sergey Smolov Trace Matcher - 0.1 Actions
10009 Verilog Translator Task Verified Normal README\ChangeLog -> README.md\ChangeLog.md Sergey Smolov Sergey Smolov Verilog Translator - 0.1 Actions
10002 Fortress Task New Normal get Boolector solver from server as dependency Sergey Smolov Sergey Smolov Fortress - 0.4 Actions
10001 Fortress Task New Normal SMT-LIBv2 benchmarks Sergey Smolov Actions
10000 Retrascope Task Verified Normal README\ChangeLog -> README.md\ChangeLog.md Sergey Smolov Sergey Smolov Retrascope - 1.2 Actions
9999 Castle Task Closed Normal ChangeLog -> ChangeLog.md Sergey Smolov Sergey Smolov Castle - 0.1 Actions
9998 Castle Task Closed Normal README -> README.md Sergey Smolov Sergey Smolov Castle - 0.1 Actions
9993 Verilog Translator Bug New High if two modules are passed to the tool and one includes another, the tool hangs Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9990 Verilog Translator Feature New Normal check for variable/net redeclarations Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9986 QEMU4V Task New Normal check if QEMU4V features can be implemented as TCG plugin Sergey Smolov Sergey Smolov QEMU4V - 0.3 Actions
9971 MicroTESK for RISC-V Task Closed Normal print Spike trace to separate log file for every JUnit test case Sergey Smolov Sergey Smolov MicroTESK for RISC-V - 0.1 Actions
9964 Retrascope Task New Normal add examples to project distribution Sergey Smolov Sergey Smolov Retrascope - 1.2 Actions
9962 Verilog Translator Bug Verified High ru.ispras.verilog.parser.sample.Mips16CoreTopTestCase: java.lang.IllegalArgumentException Sergey Smolov Alexey Danilov Verilog Translator - 0.1 Actions
9961 Verilog Translator Task New Normal uncomment jUnit test cases that are related to SVA modules Sergey Smolov Sergey Smolov Verilog Translator - 0.1 Actions
9936 Verilog Translator Bug Verified High tabs in "`define" directive cause java.lang.NumberFormatException Sergey Smolov Alexey Danilov Verilog Translator - 0.1 Actions
9917 QEMU4V Task Closed Normal check QEMU4V-specific code on compliance with coding style Sergey Smolov Sergey Smolov QEMU4V - 0.3 Actions
9915 Verilog Translator Bug Verified Urgent "Cycle inclusion has been detected in fine <filename>" error is reported for Verilog modules that use the same another file Sergey Smolov Alexey Danilov Verilog Translator - 0.1 Actions
9911 Retrascope Task New Normal merge "*/sample/*TestCase" Java test cases Sergey Smolov Maxim Chudnov Retrascope - 1.2 Actions
9909 QEMU4V Task Closed Normal migrate to QEMU 4.2.0 Sergey Smolov Sergey Smolov QEMU4V - 0.3 Actions
9904 Verilog Translator Task Verified Normal add info for "--library-file" cmdline option Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9902 Verilog Translator Bug New High java.lang.IllegalArgumentException: Descriptor for 'dma_chsel.arb_chcsr_reg' has not been found Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9901 Retrascope Test Suite Bug New Low initializationError in some tests after Jenkins update Sergey Smolov Mikhail Lebedev Actions
9899 Verilog Translator Task Verified Normal VerilogPrinter test cases for QUIP benchmarks Sergey Smolov Maxim Chudnov Verilog Translator - 0.1 Actions
9892 MicroTESK for RISC-V Bug Closed Normal WARNING: An illegal reflective access operation has occurred Sergey Smolov Alexander Protsenko MicroTESK for RISC-V - 0.1 Actions
9889 MicroTESK for Plasma Task Resolved Normal rm deprecated 'findbugs' plugin from Gradle build script Sergey Smolov Actions
9888 Retrascope IDE Task New Normal complete migration from Ant to Gradle build system Sergey Smolov Retrascope IDE - 0.1 Actions
9863 QEMU4V Task Closed Normal use Gradle 4.10.3 Sergey Smolov Sergey Smolov QEMU4V - 0.3 Actions
9862 QEMU4V Task Closed Normal migrate to QEMU 4.1.0 Sergey Smolov Sergey Smolov QEMU4V - 0.3 Actions
9859 Verilog Translator Task New Normal modify "ERROR: [Internal] null" line at error log Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9848 Verilog Translator Bug Verified Normal ru.ispras.verilog.parser.VerilogVisVerilog2SmvTestCase.runTest_Pci_Bus_Verilog_Mv_files_PciNorm: Function declaration '$ND' has not been found Sergey Smolov Sergey Smolov Verilog Translator - 0.1 Actions
9844 Retrascope Test Suite Bug Rejected Normal Bash scripts that run side tools (EBMC, SymbiYosys, Verilog2SMV) can't extract names of several Verilog modules Sergey Smolov Sergey Smolov Actions
9839 Retrascope Test Suite Task Rejected Normal scripts for commercial FV tools running Sergey Smolov Sergey Smolov Actions
9823 Retrascope IDE Task Verified Normal README.txt -> README Sergey Smolov Maxim Chudnov Retrascope IDE - 0.1 Actions
9822 Verilog Translator Bug New Normal ru.ispras.verilog.parser.VerilogIeeeTestCase.runTest_10_04_04_1: Starting points limit has been exhausted: 513 Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9816 Retrascope IDE Bug New Normal Retrascope IDE does not appear in "Installed Software" menu Sergey Smolov Maxim Chudnov Retrascope IDE - 0.1 Actions
9815 Retrascope IDE Task New Normal uninstaller for Retrascope IDE Sergey Smolov Maxim Chudnov Retrascope IDE - 0.1 Actions
9811 Verilog Translator Task Resolved High macro with parameters Sergey Smolov Alexey Danilov Verilog Translator - 0.2 Actions
9810 Retrascope IDE Task New Normal Gradle build system Sergey Smolov Maxim Chudnov Retrascope IDE - 0.1 Actions
9806 Retrascope Task Closed Normal rm dependency from commons-lang library Sergey Smolov Sergey Smolov Retrascope - 1.0 Actions
9803 Verilog Translator Bug Closed Normal ru.ispras.verilog.parser.sample.MulFifoTestCase: NullPointerException at ru.ispras.verilog.parser.elaborator.VerilogElaborator$1.getNode(VerilogElaborator.java:932) Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9802 Verilog Translator Bug Closed Normal ru.ispras.verilog.parser.sample.FuncTestCase: NullPointerException at ru.ispras.verilog.parser.elaborator.VerilogElaborator.createVariableAndBinding(VerilogElaborator.java:512) Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9798 Verilog Translator Bug Closed High ru.ispras.verilog.parser.sample.Bug9798TestCase: incorrect BVEXTRACT params for bit vector variable with offset Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9790 Verilog Translator Task New Normal external names for unnamed generate blocks Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9784 Verilog Translator Bug Closed Normal mul_fifo.v: wrong Fortress-based node representation of assignment left-hand side Sergey Smolov Sergey Smolov Verilog Translator - 0.1 Actions
9776 Retrascope IDE Task Verified Normal try to use SVEditor instead of veditor Sergey Smolov Maxim Chudnov Retrascope IDE - 0.1 Actions
9775 Verilog Translator Bug Verified Normal ru.ispras.verilog.parser.VerilogIeeeTestCase.runTest_10_04_04_1: Conversion = ''' Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9773 Verilog Translator Bug Rejected Normal ru.ispras.verilog.parser.VerilogIeeeTestCase.runTest_10_04_03_1: ru.ispras.fortress.expression.NodeOperation cannot be cast to ru.ispras.fortress.expression.NodeValue Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9771 Verilog Translator Task Closed Normal fix 'publishing' block behaviour for Gradle 4.10.3 Sergey Smolov Sergey Smolov Verilog Translator - 0.1 Actions
9769 Retrascope Feature Closed Normal GraphML printers: make branch values italic Sergey Smolov Sergey Smolov Retrascope - 1.0 Actions
9767 Retrascope Feature Closed Normal GraphML printers: use dotted arrows for Module->(Module| Process) hierarchy dependencies Sergey Smolov Sergey Smolov Retrascope - 1.0 Actions
9766 Retrascope Task Closed High remove 'vhdl.record' Git branch from remote repo Sergey Smolov Maxim Chudnov Retrascope - 1.0 Actions
9764 Retrascope IDE Task New High migrate to Eclipse 2019 Sergey Smolov Maxim Chudnov Retrascope IDE - 0.1 Actions
9763 Retrascope Test Suite Bug Closed Normal missing javadoc headers in Java files of 'ru.ispras.retrascope.engine.hldd.printer.smv.spec.sample.vcegar' package Sergey Smolov Mikhail Lebedev Actions
9762 Retrascope Task Closed High prepare to 1.1.1 release Sergey Smolov Sergey Smolov Retrascope - 1.0 Actions
9726 Retrascope Test Suite Task Closed Normal VerilogPrinter test cases Sergey Smolov Sergey Smolov Actions
9670 Retrascope Test Suite Task New Normal add 'ar.v' module to the test suite when SVA support will be implemented Sergey Smolov Sergey Smolov Actions
9658 Retrascope Task Closed Normal Check for duplicated data access conflict assertions Sergey Smolov Mikhail Lebedev Retrascope - 1.0 Actions
9607 Retrascope Test Suite Task Closed Normal add QUIP 9.0 benchmark Sergey Smolov Sergey Smolov Actions
9606 Retrascope Test Suite Task Closed Normal add IWLS 2005 benchmark Sergey Smolov Sergey Smolov Actions
9594 Verilog Translator Bug Closed Normal extra 'BVEXTRACT' operation in right hand side expression in 'assign' block's statement Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9566 Retrascope Test Suite Task Closed Normal tests for Yosys-SMTBMC tool Sergey Smolov Sergey Smolov Actions
9565 Retrascope Test Suite Task Closed Normal tests for Verilog2SMV tool Sergey Smolov Sergey Smolov Actions
9564 Retrascope Test Suite Task Closed Normal tests for EBMC tool Sergey Smolov Sergey Smolov Actions
9562 Retrascope Bug Closed Normal ru.ispras.retrascope.engine.hldd.printer.smv.usedef.MemStageUseDefSmvPrinterTestCase: model checker crashes without errors in *.smvlog Sergey Smolov Mikhail Lebedev Retrascope - 1.0 Actions
9521 Retrascope Bug Closed High NuSMV works too slow on ITC'99 b11 design Sergey Smolov Mikhail Lebedev Retrascope - 1.0 Actions
9503 Retrascope Feature Closed Normal when debug option is enabled, pass it to the model checker as well Sergey Smolov Mikhail Lebedev Retrascope - 1.0 Actions
9488 Retrascope Task New Normal CFG-GADD transformer backend that makes assignments index and range-free Sergey Smolov Sergey Smolov Retrascope - 1.2 Actions
9486 Retrascope Feature Closed Normal HDL parser's init_process backend: calculate initial values if possible Sergey Smolov Sergey Smolov Retrascope - 1.0 Actions
9485 Retrascope Bug Closed Normal missing javadoc Sergey Smolov Mikhail Lebedev Retrascope - 1.0 Actions
9484 Retrascope Task Closed Normal Check variables\switches\basic blocks number at HDL parser test cases Sergey Smolov Sergey Smolov Retrascope - 1.0 Actions
9482 Retrascope RISC-V Benchmark Bug Closed Normal ru.ispras.retrascope.sample.VexRiscvVexRiscvGaddTestCase: ERROR: Wrong number of out edges for 'ru.ispras.retrascope.model.cfg.CfgBlockStatement@c219bf5': 2 Sergey Smolov Sergey Smolov Actions
9478 Retrascope RISC-V Benchmark Bug New Normal ru.ispras.verilog.parser.sample.RocketChipTestDriverVerilogPrinterTestCase: mismatched input 'unsigned' expecting LPAREN Sergey Smolov Alexander Kamkin Actions
9477 Retrascope RISC-V Benchmark Bug New Normal an "import "DPI-C" function" construction causes Verilog Translator error Sergey Smolov Alexander Kamkin Actions
9475 Retrascope RISC-V Benchmark Bug New Normal Picorv32Hx8kdemoVerilogPrinterTestCase: ERROR: line 1:0 no viable alternative at input '(' Sergey Smolov Alexander Kamkin Actions
9474 Retrascope Feature Closed Normal enable\disable backend parameters for all the engines Sergey Smolov Sergey Smolov Retrascope - 1.0 Actions
9468 Retrascope Feature Closed Normal HDL parser backend that removes 'initial' processes Sergey Smolov Sergey Smolov Retrascope - 1.0 Actions
9463 Retrascope Bug Closed Normal check if jUnit test cases for CfgCgaaTransformer return same results on different machines\platforms Sergey Smolov Sergey Smolov Retrascope - 1.0 Actions
9462 Retrascope Task Closed Normal jUnit test cases for HDL parsers that count numbers of CFG processes, statements, etc. Sergey Smolov Sergey Smolov Retrascope - 1.0 Actions
9457 Retrascope Feature Closed Normal one more auxiliary path in GADD model for terminal endings Sergey Smolov Sergey Smolov Retrascope - 1.0 Actions
9446 Retrascope Feature Closed Normal Debug output file for engines and their backends Sergey Smolov Sergey Smolov Retrascope - 1.0 Actions
9438 Retrascope Task Closed Normal jUnit test cases for CFG-GAD transformer that check path number Sergey Smolov Sergey Smolov Retrascope - 1.0 Actions
9437 MicroTESK Bug Closed Normal ru.ispras.microtesk.model.minimips.BufferPreparatorTestCase: QEMU4V crashes with general protection error on this test program Sergey Smolov Sergey Smolov MicroTESK - 2.4 Actions
9436 MicroTESK Bug Closed Normal ru.ispras.microtesk.mmu.translator.GeneralTestCase: java.lang.IllegalArgumentException Sergey Smolov Alexander Kamkin MicroTESK - 2.5 Actions
9430 Retrascope Task Closed Normal CGAA -> GADD Sergey Smolov Sergey Smolov Retrascope - 1.0 Actions
9427 Retrascope Task Closed Normal reuse variables' versions upon CGAA model building Sergey Smolov Sergey Smolov Retrascope - 1.0 Actions
9415 QEMU4V Task Closed Normal migrate to QEMU 3.1.0 Sergey Smolov Sergey Smolov QEMU4V - 0.3 Actions
9389 Retrascope Task Closed Normal Assertion -> Property Sergey Smolov Sergey Smolov Retrascope - 1.0 Actions
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