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# Project Tracker Status Priority Subject Author Assignee Target version
9247 Retrascope Feature Open High CFG-to-C printer Sergey Smolov Sergey Smolov Retrascope - 1.2 Actions
9230 Verilog Translator Bug Closed High ru.ispras.verilog.parser.VerilogTexas97TestCase.runTest_PI_BUS_multi_master_bus: java.lang.IllegalArgumentException Sergey Smolov Sergey Smolov Verilog Translator - 0.1 Actions
10081 Retrascope Bug Resolved High tool hangs right after final "Duration: " msg Sergey Smolov Sergey Smolov Retrascope - 1.1 Actions
9231 Verilog Translator Bug Closed High ru.ispras.verilog.parser.VerilogTexas97TestCase.runTest_PI_BUS_single_master_master2: java.lang.NullPointerException Sergey Smolov Sergey Smolov Verilog Translator - 0.1 Actions
3957 Retrascope Task Closed High DFG to EFSM Sergey Smolov Sergey Smolov Actions
5873 Retrascope Bug Closed High missing transitions in b04 EFSM Sergey Smolov Sergey Smolov Retrascope - 0.1 Actions
9386 MicroTESK for PowerPC Bug Closed High ru.ispras.microtesk.model.powerpc.InstructionALUTestCase: Assembler messages: ../microtesk-powerpc/build/test/instruction_alu/instruction_alu_0000.s:1: Error: junk at end of line, first unrecognized character is `/' Sergey Smolov Sergey Smolov Actions
9311 Verilog Translator Task Closed High type casting of expression operands Sergey Smolov Sergey Smolov Verilog Translator - 0.1 Actions
9277 Retrascope Task Closed High mv clock-like variable detection to CFG-to-CGAA transformer Sergey Smolov Sergey Smolov Retrascope - 1.0 Actions
9670 Retrascope Test Suite Task New High add 'ar.v' module to the test suite when SVA support will be implemented Sergey Smolov Sergey Smolov Actions
8786 Verilog Translator Bug Closed High ru.ispras.verilog.parser.sample.FifoTestbenchTestCase fails Sergey Smolov Sergey Smolov Verilog Translator - 0.1 Actions
6959 Retrascope IDE Bug Closed High java.lang.NullPointerException at startup Sergey Smolov Sergey Smolov Retrascope IDE - 0.1 Actions
3654 С++TESK Development Environment Task Closed High source code refactoring Sergey Smolov Sergey Smolov Actions
10174 Retrascope Bug Verified High nondeterminism at EFSM transitions generation Sergey Smolov Sergey Smolov Retrascope - 1.1 Actions
10060 Retrascope Feature Resolved High Support SVA properties in CFG model Sergey Smolov Sergey Smolov Retrascope - 1.2 Actions
9762 Retrascope Task Closed High prepare to 1.1.1 release Sergey Smolov Sergey Smolov Retrascope - 1.0 Actions
5836 Local Support Project Bug Resolved High не собирается проект на сервере Jenkins Sergey Smolov Sergey Smolov Actions
6808 Retrascope Task Rejected High Split CFG processes into independent parts Sergey Smolov Sergey Smolov Retrascope - 0.2 Actions
5689 Retrascope Task Closed High implement test-to-Verilog printer Sergey Smolov Sergey Smolov Retrascope - 0.2 Actions
5385 Java SoftFloat Bug Closed Normal Странная структура директорий проекта Sergey Smolov Alexander Kamkin Actions
9802 Verilog Translator Bug Closed Normal ru.ispras.verilog.parser.sample.FuncTestCase: NullPointerException at ru.ispras.verilog.parser.elaborator.VerilogElaborator.createVariableAndBinding(VerilogElaborator.java:512) Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9803 Verilog Translator Bug Closed Normal ru.ispras.verilog.parser.sample.MulFifoTestCase: NullPointerException at ru.ispras.verilog.parser.elaborator.VerilogElaborator$1.getNode(VerilogElaborator.java:932) Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
5526 Retrascope Task Rejected Normal Retrascope engines configuration Sergey Smolov Alexander Kamkin Actions
9790 Verilog Translator Task New Normal external names for unnamed generate blocks Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9773 Verilog Translator Bug Rejected Normal ru.ispras.verilog.parser.VerilogIeeeTestCase.runTest_10_04_03_1: ru.ispras.fortress.expression.NodeOperation cannot be cast to ru.ispras.fortress.expression.NodeValue Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
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