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# Project Tracker Status Priority Subject Author Assignee Target version
9210 Verilog Translator Bug Closed High java.lang.IllegalArgumentException at ru.ispras.fortress.expression.Nodes.bvextract(Nodes.java:322) Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9209 Verilog Translator Bug Closed High java.util.EmptyStackException at ru.ispras.verilog.parser.util.TokenSourceStack.getLastParentToken(TokenSourceStack.java:70) Sergey Smolov Sergey Smolov Verilog Translator - 0.1 Actions
9208 Verilog Translator Task Closed Normal add Verilog2Smv\VIS benchmark to project test suite Sergey Smolov Sergey Smolov Verilog Translator - 0.1 Actions
9207 Verilog Translator Task Closed Normal add VCEGAR benchmark to project test suite Sergey Smolov Sergey Smolov Verilog Translator - 0.1 Actions
9206 Verilog Translator Task Closed Normal add Texas97 benchmark to project test suite Sergey Smolov Sergey Smolov Verilog Translator - 0.1 Actions
9203 Retrascope Test Suite Bug Closed Normal ru.ispras.retrascope.basis.HlddAssertSmvTestbenchBenchmarkTest.runTest: java.lang.IllegalArgumentException: 'benchmarks' field is not initialized. Sergey Smolov Mikhail Lebedev Actions
9202 Verilog Translator Bug Closed High ru.ispras.verilog.parser.sample.PjIcuIcctl1TestCase: java.lang.ArrayIndexOutOfBoundsException: 3 Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9196 Retrascope Task Closed Normal CfgVarRangeBlockBackend: use array length for assignment elaboration Sergey Smolov Sergey Smolov Retrascope - 1.0 Actions
9191 Retrascope Task Closed Normal use StringTemplate facilities to generate HDL testbenches Sergey Smolov Sergey Smolov Retrascope - 1.0 Actions
9190 Verilog Translator Bug Closed High ru.ispras.verilog.parser.sample.DescriptorBuffersTestCase: incorrect calculation for string parameter values Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9184 Veritool Bug New Normal ERROR: Unable to read config file: /usr/lib/x86_64-linux-gnu/ivl/veritool.conf Sergey Smolov Actions
9182 Verilog Translator Bug Closed High ru.ispras.verilog.parser.sample.MulFifoTestCase: java.lang.IllegalStateException: Parameter is not a value: i Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9176 Retrascope Test Suite Bug Closed Normal VcegarHlddSmvPrinterTestCase: java.lang.IllegalArgumentException: Unknown operation 'BVSDIV' Sergey Smolov Mikhail Lebedev Actions
9175 Retrascope Test Suite Bug Closed Normal Texas97PdlxCfgGraphMlTestCase: NullPointerException Sergey Smolov Sergey Smolov Actions
9174 Verilog Translator Bug Closed High NullPointerException via VerilogLiteral construction Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9173 Verilog Translator Bug Closed High Incorrect DataType: BIT_VECTOR(1) instead of BIT_VECTOR(40) Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9172 Retrascope Test Suite Bug Closed Normal Texas97ParsepackCfgGraphMlTestCase: ru.ispras.retrascope.basis.exception.RetrascopeException: Wrong range: 0 < 0 or 7 > 1. Sergey Smolov Sergey Smolov Actions
9165 Verilog Translator Bug Closed High Incorrect parameter value calculation at hierarchical Verilog description Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9160 Verilog Translator Bug Closed High ru.ispras.verilog.parser.sample.Mips16CoreTopTestCase: Module 'mips_16_core_top' cannot be found Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9149 Retrascope Feature Closed Normal elaborate ranged assignments for bitvector target variables Sergey Smolov Sergey Smolov Retrascope - 1.0 Actions
9123 Fortress Feature Closed High calculate DataType for 'BVEXTRACT(i, i, x)' NodeOperation objects Sergey Smolov Sergey Smolov Fortress - 0.4 Actions
9079 QEMU4V Feature Closed Normal basic support for MIPS32 Sergey Smolov Sergey Smolov QEMU4V - 0.2 Actions
9075 Retrascope Bug Closed Normal java.lang.IllegalArgumentException: testNum 0 != 1 topModuleNum Sergey Smolov Sergey Smolov Retrascope - 1.0 Actions
9071 Retrascope Test Suite Bug Open Normal ru.ispras.retrascope.engine.hldd.printer.smv.Texas97HlddSmvPrinterTestCase.runTest: java.lang.IllegalArgumentException: Unknown operation 'FUNCTION' Sergey Smolov Mikhail Lebedev Actions
9066 Retrascope Bug Closed Normal ru.ispras.retrascope.engine.hldd.printer.smv.Texas97HlddSmvPrinterTestCase.runTest: java.lang.NullPointerException Sergey Smolov Sergey Smolov Retrascope - 1.0 Actions
9063 MicroTESK Bug Closed Normal microtesk/src/main/java/core/ru/ispras/microtesk/utils/PropertyMap.java uses unchecked or unsafe operations Sergey Smolov Alexander Kamkin MicroTESK - 2.5 Actions
9055 Verilog Translator Bug Closed High Texas97IFetchVerilogPrinterTestCase: java.lang.IndexOutOfBoundsException: 4294967283 is out of bounds. Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9051 QEMU4V Feature Closed Normal basic support for PowerPC emulation Sergey Smolov Sergey Smolov QEMU4V - 0.3 Actions
9050 QEMU4V Feature Closed Normal basic support for i386 emulation Sergey Smolov Sergey Smolov Actions
9049 QEMU4V Feature Closed Normal basic support for MIPS64 emulation Sergey Smolov Sergey Smolov QEMU4V - 0.2 Actions
9041 Retrascope Feature Closed Normal when model checker returns an error, print it's log to the Retrascope output Sergey Smolov Mikhail Lebedev Retrascope - 1.0 Actions
9039 Retrascope Feature Closed Normal Support for designs that assign to variable more than once Sergey Smolov Sergey Smolov Retrascope - 1.0 Actions
9012 Retrascope Test Suite Bug Closed Normal VisBufferAllocVerilogPrinterTestCase: java.lang.IllegalArgumentException Sergey Smolov Actions
9011 Retrascope Test Suite Bug Closed Normal Texas97IFetchVerilogPrinterTestCase: java.lang.IndexOutOfBoundsException: 4294967283 is out of bounds. Sergey Smolov Sergey Smolov Actions
9010 Retrascope Test Suite Bug Closed Normal Texas97CacheCoherenceVerilogPrinterTestCase: java.lang.IllegalArgumentException Sergey Smolov Sergey Smolov Actions
8994 Retrascope Task Closed Normal "BVEXTRACT( ... BVEXTRACT (j i x))" expression transformation rule to the tool ruleset Sergey Smolov Sergey Smolov Retrascope - 1.0 Actions
8991 Retrascope Bug Closed Normal CfgSwitchSequenceBackend: do not collapse "if" statements with incompatible conditions Sergey Smolov Sergey Smolov Retrascope - 1.0 Actions
8990 Verilog Translator Bug Closed High vcegar-benchmarks/pi_bus/main_1.v: incorrect translation of nested "if" conditions Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
8982 Verilog Translator Task New Normal "for" loop unrolling Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
8976 Retrascope Task Closed Normal Range: old -> high, young -> low Sergey Smolov Sergey Smolov Retrascope - 1.0 Actions
8975 Retrascope Task Closed Normal RetrascopeException.makeException -> RetrascopeException.exception Sergey Smolov Sergey Smolov Retrascope - 1.0 Actions
8957 Verilog Translator Bug Closed High wrong datatype for arrays Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
8912 Retrascope Bug Closed Normal file ram.smv: line 332: variable is assigned more than once: m_ram.mem0 Sergey Smolov Sergey Smolov Retrascope - 1.0 Actions
8874 Verilog Translator Feature Closed High mapping from instance variables to their code entries Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
8871 QEMU4V Feature Closed Normal "-print-pte-addr" cmdline option Sergey Smolov Sergey Smolov Actions
8870 QEMU4V Feature Closed Normal trace generation for RISC-V programs Sergey Smolov Sergey Smolov Actions
8869 QEMU4V Feature Closed Normal trace generation for Aarch64 programs Sergey Smolov Sergey Smolov Actions
8868 QEMU4V Feature Closed Normal implement tracer that is activated by "-trace-log" command line option Sergey Smolov Sergey Smolov Actions
8867 QEMU4V Feature Closed Normal trace generation for PowerPC (32bit) programs Sergey Smolov Maxim Chudnov QEMU4V - 0.3 Actions
8866 QEMU4V Feature Closed Normal trace generation for MIPS programs Sergey Smolov Maxim Chudnov QEMU4V - 0.2 Actions
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