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# Project Tracker Status Priority Subject Author Assignee Target version
9174 Verilog Translator Bug Closed High NullPointerException via VerilogLiteral construction Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
8990 Verilog Translator Bug Closed High vcegar-benchmarks/pi_bus/main_1.v: incorrect translation of nested "if" conditions Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9173 Verilog Translator Bug Closed High Incorrect DataType: BIT_VECTOR(1) instead of BIT_VECTOR(40) Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9182 Verilog Translator Bug Closed High ru.ispras.verilog.parser.sample.MulFifoTestCase: java.lang.IllegalStateException: Parameter is not a value: i Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
8957 Verilog Translator Bug Closed High wrong datatype for arrays Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
6363 Verilog Translator Bug Closed High src/test/verilog/fifo0/mem_2p.v: AbstractMethodError Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9282 Verilog Translator Bug Closed High ru.ispras.verilog.parser.sample.DataMemTestCase: DEBUG: Reduce: (BVEXTRACT 0 7 mem_access_addr) Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
8786 Verilog Translator Bug Closed High ru.ispras.verilog.parser.sample.FifoTestbenchTestCase fails Sergey Smolov Sergey Smolov Verilog Translator - 0.1 Actions
5510 Retrascope Bug Closed High [efsm][generator][test] RandomFateSequenceIterator compilation error Sergey Smolov Igor Melnichenko Retrascope - 0.1 Actions
5425 Fortress Bug Closed High [expression] java.lang.IllegalArgumentException: Expression is not a condition: (BVEXTRACT D_IN 0 0) Sergey Smolov Andrei Tatarnikov Fortress - 0.3 Actions
5461 Fortress Bug Closed High [arrays] Insufficient arrays support Sergey Smolov Artem Kotsynyak Fortress - 0.3 Actions
6352 Fortress Bug Closed High Transformer.standardize returns 'false' on (AND (EQ a 00) (NOT(EQ a b 00))) Sergey Smolov Artem Kotsynyak Fortress - 0.4 Actions
5528 Retrascope Bug Closed High [engine][testbench] java.nio.file.FileAlreadyExistsException: decider_parser.vhd Sergey Smolov Igor Melnichenko Retrascope - 0.1 Actions
6263 Retrascope Bug Closed High Crash when test generation engine elaborates EFSMs from alu.vhd: java.lang.IllegalArgumentException Sergey Smolov Sergey Smolov Retrascope - 0.2 Actions
10023 Retrascope Bug Verified High ru.ispras.retrascope.parser.verilog.VerilogParserTestCase: java.lang.Exception: Method runTest should have no parameters Sergey Smolov Maxim Chudnov Retrascope - 1.1 Actions
5524 Retrascope Bug Closed High [engine][xml] wrong package for TestXmlPrinter Sergey Smolov Igor Melnichenko Retrascope - 0.1 Actions
9936 Verilog Translator Bug Verified High tabs in "`define" directive cause java.lang.NumberFormatException Sergey Smolov Alexey Danilov Verilog Translator - 0.1 Actions
9223 Verilog Translator Bug Closed High ru.ispras.verilog.parser.VerilogVcegarTestCase.runTest_pj_icu_icctl1: ERROR: Declaration of 'clk' has not been found Sergey Smolov Mikhail Lebedev Verilog Translator - 0.1 Actions
9521 Retrascope Bug Closed High NuSMV works too slow on ITC'99 b11 design Sergey Smolov Mikhail Lebedev Retrascope - 1.0 Actions
10174 Retrascope Bug Verified High nondeterminism at EFSM transitions generation Sergey Smolov Sergey Smolov Retrascope - 1.1 Actions
2494 CTESK Bug New Normal warning at build log Sergey Smolov Alexey Demakov Actions
5385 Java SoftFloat Bug Closed Normal Странная структура директорий проекта Sergey Smolov Alexander Kamkin Actions
10041 QEMU4V Bug Closed Normal wrong names for PowerPC registers in trace Sergey Smolov Sergey Smolov QEMU4V - 0.3 Actions
9012 Retrascope Test Suite Bug Closed Normal VisBufferAllocVerilogPrinterTestCase: java.lang.IllegalArgumentException Sergey Smolov Actions
9176 Retrascope Test Suite Bug Closed Normal VcegarHlddSmvPrinterTestCase: java.lang.IllegalArgumentException: Unknown operation 'BVSDIV' Sergey Smolov Mikhail Lebedev Actions
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