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# Project Tracker Status Priority Subject Author Assignee Target version
8857 Verilog Translator Bug Closed Normal VerilogIeeeTestCase.runTest_12_02_02_2_1: java.lang.NullPointerException Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
8856 Verilog Translator Bug Closed Normal VerilogIeeeTestCase.runTest_10_04_05_1: java.lang.IllegalArgumentException Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
8855 Verilog Translator Bug Closed Normal VerilogIeeeTestCase.runTest_10_03_00_5: java.lang.IllegalArgumentException Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
8854 Verilog Translator Bug Closed Normal VerilogIeeeTestCase.runTest_05_02_02_2: java.lang.NullPointerException Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
8853 Verilog Translator Bug Closed Normal VerilogIeeeTestCase.runTest_05_02_01_2: java.lang.IllegalArgumentException Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
8852 Verilog Translator Bug Closed Normal VerilogIeeeTestCase.runTest_05_01_14_4: java.lang.NullPointerException Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
8851 Verilog Translator Bug Closed Normal VerilogIeeeTestCase.runTest_05_01_14_3: java.lang.IllegalArgumentException: 0 must be > 0 Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
8850 Verilog Translator Bug Closed Normal VerilogIeeeTestCase.runTest_05_01_14_1: java.lang.NullPointerException Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
8849 Verilog Translator Bug Closed Normal VerilogIeeeTestCase.runTest_04_10_01_1 [floating point parameters]: java.lang.IllegalArgumentException Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
8848 Verilog Translator Bug Closed Normal test_07_08_00_1.v: Module 'pullup' cannot be found Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
8847 Verilog Translator Bug Closed Normal test_17_01_01_2_1.v: Module 'pulldown' cannot be found Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
8846 Verilog Translator Bug Closed Normal test_19_04_00_3.v: Module 'real_last' cannot be found Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
8832 Verilog Translator Bug Closed Normal verilog/opencores/mips16/IF_stage.v: java.lang.IllegalStateException: Parameter is not a value: (BVSUB 8 1) Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
8831 Verilog Translator Bug Closed Normal vcegar-benchmarks/ipbdp/ipbdp_hier.v: java.lang.IllegalArgumentException: Bit vector sizes do not match: 4 != 32. Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
8786 Verilog Translator Bug Closed High ru.ispras.verilog.parser.sample.FifoTestbenchTestCase fails Sergey Smolov Sergey Smolov Verilog Translator - 0.1 Actions
8779 Verilog Translator Bug Closed Normal mips16/data_mem.v: wrong type for define-containing declaration of 'ram_addr' wire Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
8738 Verilog Translator Bug Closed Normal DataMemTestCase falls with error Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
8205 Verilog Translator Task Closed Normal Gradle-based build environment Sergey Smolov Sergey Smolov Verilog Translator - 0.1 Actions
7725 Verilog Translator Task Closed Normal bitvector arrays support Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
7524 Verilog Translator Task Closed Normal support for non-zero-starting bit vector variables & signals Sergey Smolov Sergey Smolov Verilog Translator - 0.1 Actions
7474 Verilog Translator Bug Closed Normal missing empty branches for 'if' statements Sergey Smolov Sergey Smolov Verilog Translator - 0.1 Actions
7098 Verilog Translator Bug Closed Normal src/test/verilog/mips16/data_mem.v: 'mem_access_addr' has null declaration Sergey Smolov Sergey Smolov Verilog Translator - 0.1 Actions
6363 Verilog Translator Bug Closed High src/test/verilog/fifo0/mem_2p.v: AbstractMethodError Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
6355 Verilog Translator Bug Closed High src/test/verilog/fifo/fifo_testbench.v: NullPointerException Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
5881 Verilog Translator Task Closed Normal keep file names in the AST top nodes Sergey Smolov Sergey Smolov Verilog Translator - 0.1 Actions
5651 Verilog Translator Task Closed Normal Translate logic operation results into Boolean expressions Sergey Smolov Sergey Smolov Verilog Translator - 0.1 Actions
5567 Verilog Translator Bug Closed High VerilogStaticChecker.ExpressionVisitor is not abstract and does not override abstract method getOperandOrder() in ExprTreeVisitor Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
5492 Verilog Translator Bug Closed Normal retrascope + sapic.v = java.lang.IllegalStateException: Operand is not a constant integer value: 00000000000000000000000000000011 Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
5455 Verilog Translator Task Closed Normal устранить зависимость от ANTLRWorks Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
6864 Retrascope Task Closed Normal Remove crypto-cores from test suite Sergey Smolov Igor Melnichenko Retrascope - 0.1 Actions
6730 Retrascope Bug Closed Normal fix javadoc Sergey Smolov Mikhail Lebedev Retrascope - 0.1 Actions
6537 Retrascope Developer Request Closed Normal Efsm: collection of resetting guarded actions Sergey Smolov Igor Melnichenko Retrascope - 0.1 Actions
6534 Retrascope Task Closed Normal pass reset-like signals to EFSM-based assertions Sergey Smolov Sergey Smolov Retrascope - 0.1 Actions
6528 Retrascope Task Closed Normal random test generator Sergey Smolov Sergey Smolov Retrascope - 0.1 Actions
6511 Retrascope Task Rejected Normal keep expressions at case statements Sergey Smolov Sergey Smolov Retrascope - 0.1 Actions
6510 Retrascope Bug Closed Normal fix javadoc Sergey Smolov Mikhail Lebedev Retrascope - 0.1 Actions
6509 Retrascope Task Rejected Normal merge embedded switch nodes with conditions depending exactly from the same variable(s) Sergey Smolov Sergey Smolov Retrascope - 0.1 Actions
6504 Retrascope Bug Closed Normal fifo/fifo.v: nuSMV model checker returns ERROR Sergey Smolov Mikhail Lebedev Retrascope - 0.1 Actions
6490 Retrascope Task Closed High Gradle task & cmdline scripts for running the tool from terminal Sergey Smolov Sergey Smolov Retrascope - 0.1 Actions
6483 Retrascope Task Closed High keep related clock-like variables for top-level containers of EFSM assertions Sergey Smolov Sergey Smolov Retrascope - 0.1 Actions
6456 Retrascope Task Closed High CFG model as hirerarchical list of statements Sergey Smolov Sergey Smolov Retrascope - 0.1 Actions
6454 Retrascope Task Closed Normal group sequential switches with boolean conditions of "x == a" form Sergey Smolov Sergey Smolov Retrascope - 0.1 Actions
6453 Retrascope Task Closed Normal Statement class for grouping CFG nodes Sergey Smolov Sergey Smolov Retrascope - 0.1 Actions
6445 Retrascope Task Closed Normal compare nuXmv and NuSMV Sergey Smolov Mikhail Lebedev Retrascope - 0.1 Actions
6443 Retrascope Bug Closed Normal print error message when "--toplevel" value is wrong Sergey Smolov Sergey Smolov Retrascope - 0.1 Actions
6431 Retrascope Task Closed Normal descriptor for (VHDL) variables & signals Sergey Smolov Sergey Smolov Retrascope - 0.1 Actions
6426 Retrascope Bug Closed Normal example.vhd: HlddXmvVisitor.onProcessEnd(HlddXmvVisitor.java:381) -> NullPointerException Sergey Smolov Mikhail Lebedev Retrascope - 0.1 Actions
6425 Retrascope Bug Closed Normal b12.vhd: XmvExprPrinter.getConstant(XmvExprPrinter.java:330) -> NullPointerException Sergey Smolov Mikhail Lebedev Retrascope - 0.1 Actions
6424 Retrascope Bug Closed Normal b05.vhd: line 64: at token "d32_-10": syntax error Sergey Smolov Mikhail Lebedev Retrascope - 0.1 Actions
6413 Retrascope Bug Closed Normal b03.vhd: different EFSM extraction stats Sergey Smolov Sergey Smolov Retrascope - 0.1 Actions
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