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# Project Tracker Status Priority Subject Author Assignee Target version
9892 MicroTESK for RISC-V Bug Closed Normal WARNING: An illegal reflective access operation has occurred Sergey Smolov Alexander Protsenko MicroTESK for RISC-V - 0.1 Actions
9375 MicroTESK for PowerPC Bug Closed Normal ru.ispras.microtesk.model.powerpc.autogen.GroupTestCase: org.jruby.exceptions.RaiseException: (NoMethodError) undefined method `la' for #<GroupGenTemplate:0x6046f0da> Sergey Smolov Alexander Protsenko Actions
9387 MicroTESK for PowerPC Bug Closed Normal ru.ispras.microtesk.model.powerpc.InstructionBPUTestCase: ../microtesk-powerpc/build/test/instruction_bpu/instruction_bpu_0000.s:47: Error: operand out of range (0x0000000000002774 is not between 0x0000000000000000 and 0x000000000000001 Sergey Smolov Alexander Protsenko Actions
5127 Retrascope IDE Task Rejected Normal [cfg][printer][graphml] Интегрировать плагин для yEd Sergey Smolov Alexander Protsenko Actions
9374 MicroTESK for PowerPC Bug Closed Normal ru.ispras.microtesk.model.powerpc.autogen.BoundaryTestCase: Simulation failedThe CPR storage is not defined in the model.ru.ispras.microtesk.model.ConfigurationException: The CPR storage is not defined in the model. Sergey Smolov Alexander Protsenko Actions
9962 Verilog Translator Bug Verified High ru.ispras.verilog.parser.sample.Mips16CoreTopTestCase: java.lang.IllegalArgumentException Sergey Smolov Alexey Danilov Verilog Translator - 0.1 Actions
9936 Verilog Translator Bug Verified High tabs in "`define" directive cause java.lang.NumberFormatException Sergey Smolov Alexey Danilov Verilog Translator - 0.1 Actions
10173 Verilog Translator Bug Verified High javadoc: DefineStructure.java:37: warning: no @return Sergey Smolov Alexey Danilov Verilog Translator - 0.1 Actions
9915 Verilog Translator Bug Verified Urgent "Cycle inclusion has been detected in fine <filename>" error is reported for Verilog modules that use the same another file Sergey Smolov Alexey Danilov Verilog Translator - 0.1 Actions
10237 Verilog Translator Bug Verified High ru.ispras.verilog.parser.VerilogTexas97TestSuite#runTest_Pi_Bus_single_master_main2: ERROR: Cycle inclusion at: '...bus.v' Sergey Smolov Alexey Danilov Verilog Translator - 0.1 Actions
10216 Verilog Translator Bug Verified High ru.ispras.verilog.parser.VerilogQuipTestSuite#runTest_nut_001: java.lang.NullPointerException Sergey Smolov Alexey Danilov Verilog Translator - 0.1 Actions
10245 Verilog Translator Bug Verified Normal ru.ispras.verilog.parser.VerilogQuipTestSuite#runTest_pci_wbw_wbr_fifos: ERROR: [Internal] null Sergey Smolov Alexey Danilov Verilog Translator - 0.1 Actions
10141 Verilog Translator Bug Verified Normal check port redeclarations Sergey Smolov Alexey Danilov Verilog Translator - 0.1 Actions
9990 Verilog Translator Feature Verified High check for variable/net redeclarations Sergey Smolov Alexey Danilov Verilog Translator - 0.1 Actions
9811 Verilog Translator Task Verified High macro with parameters Sergey Smolov Alexey Danilov Verilog Translator - 0.2 Actions
6394 Local Support Project Bug New Normal Проект HDL Retrascope: на 17-дюймовом мониторе не масштабируется таблица Задачи Sergey Smolov Alexey Demakov Actions
2494 CTESK Bug New Normal warning at build log Sergey Smolov Alexey Demakov Actions
3565 Local Support Project Bug Closed Normal Перестали приходить уведомления на почту об изменениях в проектах Sergey Smolov Alexey Demakov Actions
3528 Local Support Project Bug Closed Normal Не отображается полный адрес svn-репозиториев Sergey Smolov Alexey Demakov Actions
5967 MicroTESK Task Closed Low one directory for all components of distribution Sergey Smolov Andrei Tatarnikov MicroTESK - 2.2 Actions
6108 MicroTESK Task Closed Normal create environment variable(s) for SMT solver(s) Sergey Smolov Andrei Tatarnikov MicroTESK - 2.2 Actions
6106 MicroTESK Bug Closed Normal zero opcodes for instructions in Tarmac log Sergey Smolov Andrei Tatarnikov MicroTESK - 2.2 Actions
6241 MicroTESK Bug Closed Normal Generated assembler files contain tab-only lines Sergey Smolov Andrei Tatarnikov MicroTESK - 2.2 Actions
7730 MicroTESK Bug Closed High [tarmac-logger] missing "<cpu>" tag Sergey Smolov Andrei Tatarnikov MicroTESK - 2.4 Actions
3914 Fortress Task Rejected Normal function templates Sergey Smolov Andrei Tatarnikov Fortress - 0.1 Actions
4813 Fortress Bug Closed High [solver][constraint] Невозможно создавать тривиальные ограничения Sergey Smolov Andrei Tatarnikov Fortress - 0.3 Actions
4797 Fortress Bug Closed Normal [solver] NullPointerException when solver is not found Sergey Smolov Andrei Tatarnikov Fortress - 0.3 Actions
4802 Fortress Task Closed Normal [solver][constraint] создание Constraint без указания variables Sergey Smolov Andrei Tatarnikov Fortress - 0.3 Actions
5576 Fortress Task Closed Normal Сalculate data type of expression with BVCONCAT Sergey Smolov Andrei Tatarnikov Fortress - 0.3 Actions
4554 Fortress Task Closed Normal [solver][xml] Метод преобразования ограничения в XML-based String Sergey Smolov Andrei Tatarnikov Fortress - 0.3 Actions
4699 Fortress Task Closed Normal [data][solver] поддержка массивов SMT-LIB Sergey Smolov Andrei Tatarnikov Fortress - 0.3 Actions
5563 Fortress Task Closed Normal [data] implement DataTypeId.isLogic(Enum<?> id) method Sergey Smolov Andrei Tatarnikov Fortress - 0.3 Actions
5599 Fortress Task Closed Normal [expression] implement getDataTypeId() method Sergey Smolov Andrei Tatarnikov Fortress - 0.3 Actions
5313 Fortress Task Closed Normal [expression] Сделать публичным метод ExprUtils.isSAT(Node assertion) Sergey Smolov Andrei Tatarnikov Fortress - 0.3 Actions
5465 Fortress Task Closed Normal [z3][solver] solver errors elaboration scheme Sergey Smolov Andrei Tatarnikov Fortress - 0.3 Actions
5466 Fortress Task Closed High [solver] print the input constraint when solver returns ERROR/UNKNOWN verdict Sergey Smolov Andrei Tatarnikov Fortress - 0.3 Actions
5802 Fortress Task Closed High NodeValue newZero(DataType dataType) Sergey Smolov Andrei Tatarnikov Fortress - 0.3 Actions
5162 Fortress Bug Closed Normal [solver] ReductionCustomOperationsTestCase -> java.lang.AssertionError Sergey Smolov Andrei Tatarnikov Fortress - 0.3 Actions
5425 Fortress Bug Closed High [expression] java.lang.IllegalArgumentException: Expression is not a condition: (BVEXTRACT D_IN 0 0) Sergey Smolov Andrei Tatarnikov Fortress - 0.3 Actions
5464 Fortress Task Closed High [solver] boolean expressions casting into bit vectors Sergey Smolov Andrei Tatarnikov Fortress - 0.3 Actions
5861 Fortress Task Closed Low static boolean containsSingleObject(Collection<?> collection) Sergey Smolov Andrei Tatarnikov Fortress - 0.3 Actions
5319 Fortress Task Closed Low [expression] Реализовать метод получения коллекции NodeVariable по объекту Node Sergey Smolov Andrei Tatarnikov Fortress - 0.3 Actions
5259 Fortress Task Rejected Normal [build] удаление папки distr при выполнении команды ant clean Sergey Smolov Andrei Tatarnikov Fortress - 0.3 Actions
5316 Fortress Task Closed Low [expression] Операции теории множеств над коллекциями объектов Node Sergey Smolov Andrei Tatarnikov Fortress - 0.3 Actions
5317 Fortress Task Closed Low [expression] Реализовать метод построения Constraint по Node Sergey Smolov Andrei Tatarnikov Fortress - 0.3 Actions
5318 Fortress Task Closed Low [solver][expression] Реализовать метод разрешения ограничений SolverResult solve(Constraint constraint) Sergey Smolov Andrei Tatarnikov Fortress - 0.3 Actions
5399 Fortress Task Closed Normal silent & debug mode Sergey Smolov Andrei Tatarnikov Fortress - 0.3 Actions
5401 Fortress Bug Closed Normal error at ru/ispras/fortress/solver/constraint/ArrayTestCase.java Sergey Smolov Andrei Tatarnikov Fortress - 0.3 Actions
5907 Fortress Task Closed Normal boolean areOfType(DataTypeId id, Node ... nodes) Sergey Smolov Andrei Tatarnikov Fortress - 0.3 Actions
8702 Fortress Feature Closed Normal 'public static NodeValue.newBitVector(final boolean value)' convenience method Sergey Smolov Andrei Tatarnikov Fortress - 0.4 Actions
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