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# Project Tracker Status Priority Subject Author Assignee Target version
10001 Fortress Task Rejected Normal SMT-LIBv2 benchmarks Sergey Smolov Actions
6364 Fortress Task Rejected Low SolverResult: implement equals\hashcode methods Sergey Smolov Andrei Tatarnikov Fortress - 0.4 Actions
6808 Retrascope Task Rejected High Split CFG processes into independent parts Sergey Smolov Sergey Smolov Retrascope - 0.2 Actions
6362 Retrascope Bug Rejected Normal src/test/verilog/adder/adder4_testbench.v: wrong CFG model Sergey Smolov Mikhail Chupilko Retrascope - 0.1 Actions
6366 Retrascope Bug Rejected Normal src/test/vhdl/example/test.vhd: Efsm.UNINITIALISED_STATE isn't supported yet Sergey Smolov Igor Melnichenko Retrascope - 0.2 Actions
7723 Retrascope Task Rejected Normal Support for module instances in Verilog descriptions Sergey Smolov Sergey Smolov Retrascope - 1.0 Actions
6423 Fortress Task Rejected Low to_real, to_int, is_int operations Sergey Smolov Andrei Tatarnikov Fortress - 0.4 Actions
7846 Fortress Task Rejected Normal 'Transformer.reduce(Transformer.substitute(expression, name, term))' convenience method Sergey Smolov Fortress - 0.4 Actions
6990 Retrascope IDE Task Rejected Normal use veditor 1.2.1c Sergey Smolov Sergey Smolov Retrascope IDE - 0.1 Actions
5003 Retrascope Bug Rejected Normal [util] XmlUtilTest.java: java.lang.RuntimeException: An error occured while trying to resolve a constraint. Sergey Smolov Igor Melnichenko Retrascope - 0.1 Actions
3605 Retrascope Bug Rejected Normal [vhdl][parser][cfg] Zamia не обрабатывает пакеты функций Sergey Smolov Sergey Smolov Retrascope - 0.1 Actions
7081 Retrascope Task Rejected Normal xor-composition-printer Sergey Smolov Sergey Smolov Retrascope - 0.2 Actions
4005 C++TESK Testing ToolKit Bug Rejected Normal удалить пустой README Sergey Smolov asd ert C++TESK Testing ToolKit - 1.0 Actions
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