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# Project Tracker Status Priority Subject Author Assignee Target version
6511 Retrascope Task Rejected Normal keep expressions at case statements Sergey Smolov Sergey Smolov Retrascope - 0.1 Actions
7081 Retrascope Task Rejected Normal xor-composition-printer Sergey Smolov Sergey Smolov Retrascope - 0.2 Actions
6412 Retrascope Task Rejected Normal engine combining HLDD & assertion model Sergey Smolov Sergey Smolov Retrascope - 0.1 Actions
6808 Retrascope Task Rejected High Split CFG processes into independent parts Sergey Smolov Sergey Smolov Retrascope - 0.2 Actions
6509 Retrascope Task Rejected Normal merge embedded switch nodes with conditions depending exactly from the same variable(s) Sergey Smolov Sergey Smolov Retrascope - 0.1 Actions
7723 Retrascope Task Rejected Normal Support for module instances in Verilog descriptions Sergey Smolov Sergey Smolov Retrascope - 1.0 Actions
4927 Retrascope Task Rejected Normal [cfg][model] Убрать узел типа ASSERT Sergey Smolov Sergey Smolov Retrascope - 0.1 Actions
4929 Retrascope Task Rejected Normal [cfg][model] Добавить структуру данных для представления задержек (delay) в присваиваниях Sergey Smolov Sergey Smolov Retrascope - 0.2 Actions
4971 Retrascope Task Rejected Normal [model][basis] AssignAtomicStatement vs Binding Sergey Smolov Sergey Smolov Retrascope - 0.1 Actions
5507 Retrascope Task Rejected Normal [engine][basis] implement PrinterEngine Sergey Smolov Sergey Smolov Retrascope - 0.1 Actions
9184 VeriTool Bug New Normal ERROR: Unable to read config file: /usr/lib/x86_64-linux-gnu/ivl/veritool.conf Sergey Smolov Actions
9478 Retrascope RISC-V Benchmark Bug New Normal ERROR: retrascope-riscv\src\main\verilog\rocket-chip\src\main\resources\vsrc\TestDriver.v line 28:2 no viable alternative at input 'int' Sergey Smolov Actions
9012 Retrascope Test Suite Bug Closed Normal VisBufferAllocVerilogPrinterTestCase: java.lang.IllegalArgumentException Sergey Smolov Actions
10290 Verilog Translator Feature New Normal SystemVerilog support Sergey Smolov Actions
10088 QEMU4V Feature New Low QEMU4V formatted traces for x86 programs Sergey Smolov Actions
3659 С++TESK Development Environment Task New Normal Соответствие полей классов сообщений и сигналов HDL-модели Sergey Smolov Actions
3755 С++TESK Development Environment Task New Normal namespace name for test system prototypes Sergey Smolov Actions
8167 QEMU4V Task New Low Program flow tracing Sergey Smolov Actions
3756 С++TESK Development Environment Task New Immediate Генерация C++ кода для модели сообщений Sergey Smolov Actions
9888 Retrascope IDE Task New Normal complete migration from Ant to Gradle build system Sergey Smolov Retrascope IDE - 0.1 Actions
3759 С++TESK Development Environment Task Feedback Normal Разработать демонстрационный пример для структуры соответствия Sergey Smolov Actions
9889 MicroTESK for Plasma Task Resolved Normal rm deprecated 'findbugs' plugin from Gradle build script Sergey Smolov Actions
9217 MicroTESK Task Closed Normal Use 'ru.ispras.castle.codegen' package classes from Castle Sergey Smolov Actions
7846 Fortress Task Rejected Normal 'Transformer.reduce(Transformer.substitute(expression, name, term))' convenience method Sergey Smolov Fortress - 0.4 Actions
10001 Fortress Task Rejected Normal SMT-LIBv2 benchmarks Sergey Smolov Actions
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