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# Project Tracker Status Priority Subject Author Assignee Target version
9224 Verilog Translator Bug Closed High ru.ispras.verilog.parser.VerilogTexas97TestCase.runTest_PCI_BUS_Verilog_MV_files_PCInorm: ERROR: Function declaration '$random' has not been found Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9214 Verilog Translator Bug Rejected High ru.ispras.verilog.parser.VerilogTexas97TestCase.runTest_PPC60X_bus_src_cpu: Module 'AddressTenure' cannot be found Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9182 Verilog Translator Bug Closed High ru.ispras.verilog.parser.sample.MulFifoTestCase: java.lang.IllegalStateException: Parameter is not a value: i Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9215 Verilog Translator Bug Rejected High ru.ispras.verilog.parser.VerilogTexas97TestCase.runTest_PPC60X_bus_src_mem: Module 'AddrStatus' cannot be found Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9213 Verilog Translator Bug Rejected High ru.ispras.verilog.parser.VerilogTexas97TestCase.runTest_PPC60X_bus_src_arbiter: Module 'ArbiterStatus' cannot be found Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
8874 Verilog Translator Feature Closed High mapping from instance variables to their code entries Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9212 Verilog Translator Bug Closed High ru.ispras.verilog.parser.VerilogVisVerilog2SmvTestCase.runTest_Vlunc_vlunc: Module 'transform' cannot be found Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
8990 Verilog Translator Bug Closed High vcegar-benchmarks/pi_bus/main_1.v: incorrect translation of nested "if" conditions Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9251 Verilog Translator Task Closed High calculate type of index for bit-vector arrays Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
5249 Retrascope Task Closed High [basis] Настройка Retrascope для работы с SMT-решателями Sergey Smolov Alexander Kamkin Retrascope - 0.1 Actions
9190 Verilog Translator Bug Closed High ru.ispras.verilog.parser.sample.DescriptorBuffersTestCase: incorrect calculation for string parameter values Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9993 Verilog Translator Bug New High if two modules are passed to the tool and one includes another, the tool hangs Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
10102 MicroTESK Bug Verified High incorrect ld scripts for x86 test programs Sergey Smolov Alexander Kamkin MicroTESK - 2.5 Actions
9210 Verilog Translator Bug Closed High java.lang.IllegalArgumentException at ru.ispras.fortress.expression.Nodes.bvextract(Nodes.java:322) Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9174 Verilog Translator Bug Closed High NullPointerException via VerilogLiteral construction Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9936 Verilog Translator Bug Verified High tabs in "`define" directive cause java.lang.NumberFormatException Sergey Smolov Alexey Danilov Verilog Translator - 0.1 Actions
9811 Verilog Translator Task Resolved High macro with parameters Sergey Smolov Alexey Danilov Verilog Translator - 0.2 Actions
9962 Verilog Translator Bug Verified High ru.ispras.verilog.parser.sample.Mips16CoreTopTestCase: java.lang.IllegalArgumentException Sergey Smolov Alexey Danilov Verilog Translator - 0.1 Actions
4813 Fortress Bug Closed High [solver][constraint] Невозможно создавать тривиальные ограничения Sergey Smolov Andrei Tatarnikov Fortress - 0.3 Actions
8665 Fortress Feature Closed High Nodes.BVEXTRACT(Node, Node, Node) convenience method Sergey Smolov Andrei Tatarnikov Fortress - 0.4 Actions
5985 Fortress Task Closed High Node ExprUtils.getEquation(Node target, Node value) Sergey Smolov Andrei Tatarnikov Fortress - 0.4 Actions
5425 Fortress Bug Closed High [expression] java.lang.IllegalArgumentException: Expression is not a condition: (BVEXTRACT D_IN 0 0) Sergey Smolov Andrei Tatarnikov Fortress - 0.3 Actions
7730 MicroTESK Bug Closed High [tarmac-logger] missing "<cpu>" tag Sergey Smolov Andrei Tatarnikov MicroTESK - 2.4 Actions
5466 Fortress Task Closed High [solver] print the input constraint when solver returns ERROR/UNKNOWN verdict Sergey Smolov Andrei Tatarnikov Fortress - 0.3 Actions
5464 Fortress Task Closed High [solver] boolean expressions casting into bit vectors Sergey Smolov Andrei Tatarnikov Fortress - 0.3 Actions
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