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# Project Tracker Status Priority Subject Author Assignee Target version
3756 С++TESK Development Environment Task New Immediate Генерация C++ кода для модели сообщений Sergey Smolov Actions
9993 Verilog Translator Bug New High if two modules are passed to the tool and one includes another, the tool hangs Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9902 Verilog Translator Bug New High java.lang.IllegalArgumentException: Descriptor for 'dma_chsel.arb_chcsr_reg' has not been found Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9764 Retrascope IDE Task New High migrate to Eclipse 2019 Sergey Smolov Maxim Chudnov Retrascope IDE - 0.1 Actions
9670 Retrascope Test Suite Task New High add 'ar.v' module to the test suite when SVA support will be implemented Sergey Smolov Sergey Smolov Actions
4713 Fortress Task New High SMT-LIB structures Sergey Smolov Artem Kotsynyak Fortress - 0.4 Actions
9986 QEMU4V Task New Normal check if QEMU4V features can be implemented as TCG plugin Sergey Smolov Sergey Smolov QEMU4V - 0.3 Actions
10031 MicroTESK for PowerPC Bug New Normal WARNING: An illegal reflective access operation has occurred Sergey Smolov Alexander Protsenko MicroTESK for PowerPC - 0.0 Actions
9888 Retrascope IDE Task New Normal complete migration from Ant to Gradle build system Sergey Smolov Retrascope IDE - 0.1 Actions
9184 VeriTool Bug New Normal ERROR: Unable to read config file: /usr/lib/x86_64-linux-gnu/ivl/veritool.conf Sergey Smolov Actions
3755 С++TESK Development Environment Task New Normal namespace name for test system prototypes Sergey Smolov Actions
8587 MicroTESK Feature New Normal ISA subsets Sergey Smolov Artem Kotsynyak MicroTESK - 2.5 Actions
9377 MicroTESK for MIPS Bug New Normal 'Failed to construct decoder' warnings in project's build log Sergey Smolov Alexander Kamkin Actions
10082 Retrascope Bug New Normal WARNING: Illegal reflective access by org.python.core.PySystemState Sergey Smolov Sergey Smolov Retrascope - 1.1 Actions
10133 Retrascope Task New Normal use '-coi' model checker option Sergey Smolov Mikhail Lebedev Retrascope - 1.1 Actions
10074 MicroTESK Feature New Normal option that stores boot obj at the generated ld script Sergey Smolov Alexander Kamkin MicroTESK - 2.5 Actions
9477 Retrascope RISC-V Benchmark Bug New Normal an "import "DPI-C" function" construction causes Verilog Translator error Sergey Smolov Alexander Kamkin Actions
9376 MicroTESK for MIPS Bug New Normal Warning: Group MIPS64FpuOp contains two items add_fmt and mfc1 with the same opcode 01000100000000000000000000000000 Sergey Smolov Alexander Kamkin Actions
9478 Retrascope RISC-V Benchmark Bug New Normal ERROR: retrascope-riscv\src\main\verilog\rocket-chip\src\main\resources\vsrc\TestDriver.v line 28:2 no viable alternative at input 'int' Sergey Smolov Actions
5504 Retrascope Task New Normal add channels between EFSMs Sergey Smolov Mikhail Lebedev Retrascope - 1.2 Actions
6446 Retrascope Task New Normal Promela translator to CFG representation (no buffers) Sergey Smolov Mikhail Lebedev Retrascope - 2.0 Actions
10058 Retrascope Task New Normal User documentation Sergey Smolov Sergey Smolov Retrascope - 1.2 Actions
6394 Local Support Project Bug New Normal Проект HDL Retrascope: на 17-дюймовом мониторе не масштабируется таблица Задачи Sergey Smolov Alexey Demakov Actions
9488 Retrascope Task New Normal CFG-GADD transformer backend that makes assignments index and range-free Sergey Smolov Sergey Smolov Retrascope - 1.2 Actions
4674 TestBase Task New Normal Тестовые ситуации Sergey Smolov Artem Kotsynyak TestBase - 0.0 Actions
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