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# Project Tracker Status Priority Subject Author Assignee Target version
1210 Veritool Task Closed Normal $applyAction() + $checkAction = too much Alexander Kamkin Alexander Kamkin Actions
3095 C++TESK Testing ToolKit Task Closed Normal 20-ый билд перед отпуском Alexander Kamkin Alexander Kamkin Actions
6218 MicroTESK Task Closed Normal Add a reference to DataManager to EngineContext Alexander Kamkin Andrei Tatarnikov MicroTESK - 2.2 Actions
8698 MicroTESK Task Closed Normal Adding makefiles to MicroTESK demos Alexander Kamkin Andrei Tatarnikov MicroTESK - 2.4 Actions
8670 MicroTESK Bug Rejected Normal Address 0xffffffffa0002380 is unallocated. Simulation is paused until it is allocated. Alexander Kamkin Andrei Tatarnikov MicroTESK - 2.4 Actions
5986 MicroTESK Task Closed High Addresses in ConcreteCall and TestSequence Alexander Kamkin Andrei Tatarnikov MicroTESK - 2.2 Actions
6150 MicroTESK Bug Closed Normal Address translation specification Alexander Kamkin Artem Kotsynyak MicroTESK - 2.3 Actions
4392 Verilog Translator Task Closed Normal Add return value for on<Node>(Begin|End) methods Alexander Kamkin Alexander Kamkin Verilog Translator - 0.1 Actions
4670 C++TESK Testing ToolKit Task Closed Normal All resolved issues shoud be closed Alexander Kamkin Alexander Kamkin Actions
5435 MicroTESK Task Closed Normal An architecture validator engine is required Alexander Kamkin Andrei Tatarnikov MicroTESK - 2.2 Actions
2765 Retrascope Task Closed Normal Annotating variables with clocks Alexander Kamkin Sergey Smolov Actions
5955 MicroTESK Task Closed Normal Architecture-dependent configuration Alexander Kamkin Alexander Kamkin MicroTESK - 2.2 Actions
5345 MicroTESK Task Closed Normal [arch] Notes to the existing architecture models and templates Alexander Kamkin Andrei Tatarnikov MicroTESK - 2.1 Actions
3541 Verilog Translator Bug Closed Normal AST_ASSIGNMENT_STATEMENT -> AST_ASSIGN_STATEMENT Alexander Kamkin Alexander Kamkin Actions
3474 Verilog Translator Task Closed Normal AST_ASSIGNMENT для параметров Alexander Kamkin Alexander Kamkin Actions
3483 Verilog Translator Task Closed Normal AST_BODY_GENERATE -> AST_GENERATE_BLOCK Alexander Kamkin Alexander Kamkin Actions
4110 Verilog Translator Bug New Normal AST_DECLARATION: adding delay for net declarations Alexander Kamkin Alexander Kamkin Verilog Translator - 0.1 Actions
3485 Verilog Translator Task Closed Normal AST_DISCRETE_ASSIGNMENT -> AST_ASSIGNMENT_STATEMENT Alexander Kamkin Alexander Kamkin Actions
3486 Verilog Translator Task Closed Normal AST_EVENT_TRIGGER -> AST_EVENT_TRIGGER_STATEMENT Alexander Kamkin Alexander Kamkin Actions
4111 Verilog Translator Task Closed Normal AST_INSTANTIATION: += AST_STRENGTH Alexander Kamkin Alexander Kamkin Actions
3542 Verilog Translator Task Closed Normal AST_MODULE -> AST_MODULE_TYPE, AST_*_DECLARATION -> AST_* Alexander Kamkin Alexander Kamkin Actions
3480 Verilog Translator Task Closed Normal AST_PORT_CONNECTION += AST_ATTRIBUTES Alexander Kamkin Alexander Kamkin Actions
3537 Verilog Translator Task Closed Normal AST_PROCESS -> AST_ACTIVITY Alexander Kamkin Alexander Kamkin Actions
3459 Verilog Translator Task Closed Normal AST_TYPE structure refactoring Alexander Kamkin Alexander Kamkin Actions
3538 Verilog Translator Bug Closed Normal AST_VARIABLE -> AST_ELEMENT Alexander Kamkin Actions
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