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# Project Tracker Status Priority Subject Author Assignee Target version
6448 Retrascope Task New Low mapping description language + IR + parser Sergey Smolov Sergey Smolov Retrascope - 2.0 Actions
6449 Retrascope Task New Low testbench generator taking test sequences and mappings as inputs Sergey Smolov Sergey Smolov Retrascope - 2.0 Actions
4363 Retrascope Task New Low Критерий кластеризации входных сигналов, основанный на GA Sergey Smolov Sergey Smolov Retrascope - 2.0 Actions
4521 Retrascope Task New Low Входной класс для генератора тестовой последовательности Sergey Smolov Sergey Smolov Retrascope - 2.0 Actions
4880 Retrascope Task New Low Проектирование внутреннего представления для блок-схем Alexander Kamkin Sergey Smolov Retrascope - 2.0 Actions
4881 Retrascope Task New Low Реализация алгоритма построения блок-схем по внутреннему представлению Alexander Kamkin Sergey Smolov Retrascope - 2.0 Actions
4887 Retrascope Task New Low Разработка внутреннего представления тестовой системы Alexander Kamkin Sergey Smolov Retrascope - 2.0 Actions
4888 Retrascope Task New Low Генератор заготовки тестовой системы по ее описанию Alexander Kamkin Sergey Smolov Retrascope - 2.0 Actions
4889 Retrascope Task New Low Генерация заготовки эталонной модели по набору блок-схем (flowchart) Alexander Kamkin Sergey Smolov Retrascope - 2.0 Actions
2059 С++TESK Development Environment Task New Low Использование разных цветов для выделения ключевых слов C++ и С++TESK Alexander Kamkin Sergey Smolov Actions
10382 Verilog Translator Bug Resolved Normal java.lang.IllegalArgumentException: expression=(BVREPEAT test.uut._saxi_maskwidth 1) Sergey Smolov Sergey Smolov Verilog Translator - 0.1 Actions
10002 Fortress Task Open Normal get Boolector solver from server as dependency Sergey Smolov Sergey Smolov Fortress - 0.4 Actions
10336 Retrascope Bug Verified Normal Incorrect ranges in vhdl/plasma/reg_bank.vhd Mikhail Lebedev Sergey Smolov Retrascope - 1.1 Actions
10191 Retrascope Bug Resolved Normal java.lang.IllegalArgumentException: Specified target vertex 0 is not part of graph Sergey Smolov Sergey Smolov Retrascope - 1.1 Actions
10299 Fortress Bug Resolved Normal Probably, a bug in BitVector.isAll{Set,Reset} Alexander Kamkin Sergey Smolov Fortress - 0.4 Actions
10287 Retrascope Feature Verified Normal TestModel: keep top level module name & variables Sergey Smolov Sergey Smolov Retrascope - 1.1 Actions
10280 MicroTESK Bug Resolved Normal Can't find QEMU trace file Alexander Protsenko Sergey Smolov MicroTESK - 2.5 Actions
10229 Retrascope Test Suite Task Resolved Normal Handle $ND functions Mikhail Lebedev Sergey Smolov Actions
9929 Verilog Translator Bug Resolved Normal TODO: QuipTestCase extraneous input 'someone' expecting 'someone' Maxim Chudnov Sergey Smolov Verilog Translator - 0.1 Actions
10238 Retrascope Feature Resolved Normal VerilogParser: '--library-file' cmdline option Sergey Smolov Sergey Smolov Retrascope - 1.1 Actions
10230 Retrascope Task Verified Normal Java version in README.md Mikhail Lebedev Sergey Smolov Retrascope - 1.1 Actions
9822 Verilog Translator Bug Resolved Normal ru.ispras.verilog.parser.VerilogIeeeTestCase.runTest_10_04_04_1: Starting points limit has been exhausted: 513 Sergey Smolov Sergey Smolov Verilog Translator - 0.1 Actions
10197 Verilog Translator Bug Resolved Normal Test const.v has an error. Alexey Danilov Sergey Smolov Verilog Translator - 0.1 Actions
10195 Verilog Translator Bug Resolved Normal Test test_12_04_02_4.v has an error. Alexey Danilov Sergey Smolov Verilog Translator - 0.1 Actions
10196 Verilog Translator Bug Resolved Normal Test mpeg1.v has an error. Alexey Danilov Sergey Smolov Verilog Translator - 0.1 Actions
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