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# Project Tracker Status Priority Subject Author Assignee Target version
10107 MicroTESK Task New Normal Entry point specification in templates Alexander Kamkin Alexander Kamkin MicroTESK - 2.5 Actions
10509 Verilog Translator Bug New Normal ERROR: [Internal] 0 must be > 0 Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
10505 Verilog Translator Bug New Normal ERROR: [Internal] 11 must be within range [0, 1) Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
10510 Verilog Translator Bug New Normal ERROR: [Internal] Bit vector sizes do not match: 32 != 2. Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
10508 Verilog Translator Bug New Normal ERROR: [Internal] Java heap space Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9471 MicroTESK Bug New Normal ERROR (SEMANTIC): The given bitfield expressions cannot be reduced to constant value Alexander Protsenko Alexander Kamkin MicroTESK - 2.5 Actions
10215 Verilog Translator Bug New Normal ERROR: Starting points limit has been exhausted: 2255 Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
8797 Verilog Translator Bug New Normal Error when using multiple includes Alexander Kamkin Alexander Kamkin Verilog Translator - 0.1 Actions
8678 MicroTESK for MIPS Bug Resolved Normal Exception in exception handler Alexander Kamkin Alexander Kamkin MicroTESK for MIPS - 0.0 Actions
8675 MicroTESK for MIPS Bug Resolved Normal Executing tlbwi causes CU0 Alexander Kamkin Alexander Kamkin MicroTESK for MIPS - 0.0 Actions
9790 Verilog Translator Task New Normal external names for unnamed generate blocks Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
9377 MicroTESK for MIPS Bug New Normal 'Failed to construct decoder' warnings in project's build log Sergey Smolov Alexander Kamkin Actions
4884 Retrascope IDE Task New Normal [flowchart][visualizator][zest] Визуализация блок-схем Alexander Kamkin Alexander Kamkin Retrascope IDE - 0.1 Actions
8982 Verilog Translator Task New Normal "for" loop unrolling Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
7678 MicroTESK Task New Low Generation of LLVM configuration files from nML specifications Andrei Tatarnikov Alexander Kamkin MicroTESK - 2.5 Actions
6396 MicroTESK Bug New Normal Handling TAG_REPLACED dependencies Alexander Kamkin Alexander Kamkin MicroTESK - 2.5 Actions
9993 Verilog Translator Bug New High if two modules are passed to the tool and one includes another, the tool hangs Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
5352 TestBase Task New Normal Implementation of FpMulHardToNRound Alexander Kamkin Alexander Kamkin TestBase - 0.0 Actions
5351 TestBase Task New Normal Implementation of ResultAdapter for FP.MUL Alexander Kamkin Alexander Kamkin TestBase - 0.0 Actions
10102 MicroTESK Bug Verified High incorrect ld scripts for x86 test programs Sergey Smolov Alexander Kamkin MicroTESK - 2.5 Actions
4171 Veritool Bug Resolved Normal Int128-512: Возможно ошибка Alexander Kamkin Alexander Kamkin Actions
4170 Veritool Bug Resolved Normal Int128-512: Замечания к коду Alexander Kamkin Alexander Kamkin Actions
9603 Verilog Translator Bug New Normal Interface signals not in port list Mikhail Lebedev Alexander Kamkin Actions
10179 MicroTESK Bug Resolved High java.lang.AssertionError: lw core=0, address=1c: deadbeef != d3d5e5f9 Alexander Kamkin Alexander Kamkin MicroTESK - 2.5 Actions
9902 Verilog Translator Bug New High java.lang.IllegalArgumentException: Descriptor for '<var name>' has not been found Sergey Smolov Alexander Kamkin Verilog Translator - 0.1 Actions
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