Verilog Translator

For example:

ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:13 extraneous input ''b1010' expecting SEMI
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:13 extraneous input ''b1010' expecting COLON
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:11 extraneous input ''b1110' expecting SEMI
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:11 extraneous input ''b1110' expecting COLON
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:16 extraneous input ''b0001' expecting SEMI
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:11 extraneous input ''b0000' expecting COLON
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:13 extraneous input ''b1011' expecting SEMI
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:12 extraneous input ''b1101' expecting SEMI
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:12 extraneous input ''b1101' expecting COLON
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:8 extraneous input ''b1111' expecting SEMI
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:8 extraneous input ''b1111' expecting COLON
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:13 extraneous input ''b0011' expecting SEMI
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:16 extraneous input ''b0001' expecting SEMI
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:13 extraneous input ''b1011' expecting SEMI
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:12 extraneous input ''b1101' expecting SEMI
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:8 extraneous input ''b1111' expecting SEMI
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:13 extraneous input ''b1011' expecting COLON
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:16 extraneous input ''b0001' expecting SEMI
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:16 extraneous input ''b0001' expecting COLON
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:12 extraneous input ''b1101' expecting SEMI
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:13 extraneous input ''b0011' expecting SEMI
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:13 extraneous input ''b1011' expecting SEMI
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:13 extraneous input ''b0011' expecting COLON
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:13 extraneous input ''b0010' expecting SEMI
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:13 extraneous input ''b0010' expecting COLON
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:19 extraneous input ''b0100' expecting SEMI
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:13 extraneous input ''b0110' expecting SEMI
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:19 extraneous input ''b0100' expecting COLON
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:9 extraneous input ''b1000' expecting SEMI
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:9 extraneous input ''b1000' expecting COLON
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:9 extraneous input ''b1001' expecting SEMI
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:9 extraneous input ''b1001' expecting COLON
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:11 extraneous input ''b1110' expecting SEMI
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:13 extraneous input ''b0110' expecting COLON
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:8 extraneous input ''b0111' expecting SEMI
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:8 extraneous input ''b0111' expecting COLON
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:20 extraneous input ''b1100' expecting SEMI
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:8 extraneous input ''b0101' expecting SEMI
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:8 extraneous input ''b0101' expecting COLON
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:20 extraneous input ''b1100' expecting SEMI
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:20 extraneous input ''b1100' expecting COLON
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:11 extraneous input ''b1110' expecting SEMI
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:20 extraneous input ''b1100' expecting SEMI
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:12 extraneous input ''b1101' expecting RPAREN
ERROR: /home/chudnov/Projects/veritrans/src/test/verilog/hdl-benchmarks/hdl/quip/oc_sdram/sdramcnt.v line 1:16 extraneous input ''b0001' expecting RPAREN
module sdramcnt(sys_rst_l /* DECL: sys_rst_l /, sys_clk / DECL: sys_clk /, sd_wr_l / DECL: sd_wr_l /, sd_cs_l / DECL: sd_cs_l /, sd_ras_l / DECL: sd_ras_l /, sd_cas_l / DECL: sd_cas_l /, sd_dqm / DECL: sd_dqm /, do_mode_set / DECL: do_mode_set /, do_read / DECL: do_read /, do_write / DECL: do_write /, doing_refresh / DECL: doing_refresh /, sd_addx_mux / DECL: sd_addx_mux /, sd_addx10_mux / DECL: sd_addx10_mux /, sd_rd_ena / DECL: sd_rd_ena /, sd_data_ena / DECL: sd_data_ena /, modereg_cas_latency / DECL: modereg_cas_latency /, modereg_burst_length / DECL: modereg_burst_length /, mp_data_mux / DECL: mp_data_mux /, decoded_dqm / DECL: decoded_dqm /, do_write_ack / DECL: do_write_ack /, do_read_ack / DECL: do_read_ack /, do_modeset_ack / DECL: do_modeset_ack /, pwrup / DECL: pwrup /, next_state / DECL: next_state /, autorefresh_cntr / DECL: autorefresh_cntr /, autorefresh_cntr_l / DECL: autorefresh_cntr_l /, cntr_limit / DECL: cntr_limit /, sys_rst_l / DECL: sys_rst_l /, sys_clk / DECL: sys_clk /, sd_wr_l / DECL: sd_wr_l /, sd_cs_l / DECL: sd_cs_l /, sd_ras_l / DECL: sd_ras_l /, sd_cas_l / DECL: sd_cas_l /, sd_dqm / DECL: sd_dqm /, do_mode_set / DECL: do_mode_set /, do_read / DECL: do_read /, do_write / DECL: do_write /, doing_refresh / DECL: doing_refresh /, sd_addx_mux / DECL: sd_addx_mux /, sd_addx10_mux / DECL: sd_addx10_mux /, sd_rd_ena / DECL: sd_rd_ena /, sd_data_ena / DECL: sd_data_ena /, modereg_cas_latency / DECL: modereg_cas_latency /, modereg_burst_length / DECL: modereg_burst_length /, mp_data_mux / DECL: mp_data_mux /, decoded_dqm / DECL: decoded_dqm /, do_write_ack / DECL: do_write_ack /, do_read_ack / DECL: do_read_ack /, do_modeset_ack / DECL: do_modeset_ack /, pwrup / DECL: pwrup /, next_state / DECL: next_state /, autorefresh_cntr / DECL: autorefresh_cntr /, autorefresh_cntr_l / DECL: autorefresh_cntr_l /, cntr_limit / DECL: cntr_limit /);
parameter N1 = 00000000000000000000000000000100 / 00000000000000000000000000000100 */;