Project

General

Profile

Task #9899

VerilogPrinter test cases for QUIP benchmarks

Added by Sergey Smolov 3 months ago. Updated 2 months ago.

Status:
Verified
Priority:
Normal
Assignee:
Target version:
Start date:
10/31/2019
Due date:
% Done:

0%

Estimated time:
Detected in build:
master
Published in build:

History

#1

Updated by Sergey Smolov 2 months ago

  • Target version set to 0.1
  • Category deleted (Verilog Translator)
  • Project changed from Retrascope Test Suite to Verilog Translator
#2

Updated by Maxim Chudnov 2 months ago

  • Status changed from New to Resolved
#3

Updated by Sergey Smolov 2 months ago

  • Status changed from Resolved to Verified

Also available in: Atom PDF