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Task #9899

VerilogPrinter test cases for QUIP benchmarks

Added by Sergey Smolov about 1 year ago. Updated about 2 months ago.

Status:
Closed
Priority:
Normal
Assignee:
Target version:
Start date:
10/31/2019
Due date:
% Done:

0%

Estimated time:
Detected in build:
master
Published in build:
0.1.3-beta-201002

History

#1

Updated by Sergey Smolov about 1 year ago

  • Target version set to 0.1
  • Category deleted (Verilog Translator)
  • Project changed from Retrascope Test Suite to Verilog Translator
#2

Updated by Maxim Chudnov about 1 year ago

  • Status changed from New to Resolved
#3

Updated by Sergey Smolov about 1 year ago

  • Status changed from Resolved to Verified
#4

Updated by Sergey Smolov about 2 months ago

  • Published in build set to 0.1.3-beta-201002
  • Status changed from Verified to Closed

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