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Bug #9848

ru.ispras.verilog.parser.VerilogVisVerilog2SmvTestCase.runTest_Pci_Bus_Verilog_Mv_files_PciNorm: Function declaration '$ND' has not been found

Added by Sergey Smolov 18 days ago.

Status:
New
Priority:
Normal
Target version:
Start date:
10/04/2019
Due date:
% Done:

0%

Estimated time:
Detected in build:
master
Platform:
Published in build:

Description

ERROR: Function declaration '$ND' has not been found
ERROR: [Internal] null
java.lang.IllegalArgumentException
    at ru.ispras.fortress.util.InvariantChecks.checkTrue(InvariantChecks.java:53)
    at ru.ispras.fortress.util.InvariantChecks.checkTrue(InvariantChecks.java:38)
    at ru.ispras.fortress.util.InvariantChecks.checkFalse(InvariantChecks.java:68)
    at ru.ispras.verilog.parser.VerilogTranslator.exit(VerilogTranslator.java:112)
    at ru.ispras.verilog.parser.backends.syntax.checker.VerilogStaticChecker.checkFunctionCall(VerilogStaticChecker.java:651)
    at ru.ispras.verilog.parser.backends.syntax.checker.VerilogStaticChecker.access$000(VerilogStaticChecker.java:72)
    at ru.ispras.verilog.parser.backends.syntax.checker.VerilogStaticChecker$ExprTreeVisitor.onOperationBegin(VerilogStaticChecker.java:97)
    at ru.ispras.fortress.expression.ExprTreeWalker.visitOperation(ExprTreeWalker.java:139)
    at ru.ispras.fortress.expression.ExprTreeWalker.visitNode(ExprTreeWalker.java:123)
    at ru.ispras.verilog.parser.backends.syntax.checker.VerilogStaticChecker.checkReference(VerilogStaticChecker.java:468)
    at ru.ispras.verilog.parser.backends.syntax.checker.VerilogStaticChecker.checkReference(VerilogStaticChecker.java:480)
    at ru.ispras.verilog.parser.backends.syntax.checker.VerilogStaticChecker.checkReference(VerilogStaticChecker.java:497)
    at ru.ispras.verilog.parser.backends.syntax.checker.VerilogStaticChecker.checkReference(VerilogStaticChecker.java:527)
    at ru.ispras.verilog.parser.backends.syntax.checker.VerilogStaticChecker.onAssignBegin(VerilogStaticChecker.java:129)
    at ru.ispras.verilog.parser.walker.VerilogNodeVisitor$2.onBegin(VerilogNodeVisitor.java:253)
    at ru.ispras.verilog.parser.walker.VerilogNodeVisitor.onBegin(VerilogNodeVisitor.java:700)
    at ru.ispras.verilog.parser.core.TreeWalker.onBegin(TreeWalker.java:102)
    at ru.ispras.verilog.parser.core.TreeWalker.start(TreeWalker.java:87)
    at ru.ispras.verilog.parser.VerilogSyntaxBackend.start(VerilogSyntaxBackend.java:80)
    at ru.ispras.verilog.parser.VerilogSyntaxBackends.start(VerilogSyntaxBackends.java:55)
    at ru.ispras.verilog.parser.VerilogTranslator.start(VerilogTranslator.java:187)
    at ru.ispras.verilog.parser.sample.VerilogPrinter.main(VerilogPrinter.java:45)
    at ru.ispras.verilog.parser.VerilogBenchmarkTest.runTest(VerilogBenchmarkTest.java:72)
    at ru.ispras.verilog.parser.VerilogBenchmarkTest.runTest(VerilogBenchmarkTest.java:58)
    at ru.ispras.verilog.parser.VerilogTexas97TestCase.runTest_Pci_Bus_Verilog_Mv_files_PciNorm(VerilogTexas97TestCase.java:514)

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