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Bug #9478

ru.ispras.verilog.parser.sample.RocketChipTestDriverVerilogPrinterTestCase: mismatched input 'unsigned' expecting LPAREN

Added by Sergey Smolov 5 months ago.

Status:
New
Priority:
Normal
Category:
Verilog Translator
Start date:
02/06/2019
Due date:
% Done:

0%

Estimated time:
Detected in build:
master
Platform:
Published in build:

Description

The ru.ispras.verilog.parser.sample.RocketChipTestDriverVerilogPrinterTestCase test case falls with the following error:

ERROR: L:\work\retrascope-riscv\src\main\verilog\rocket-chip\src\main\resources\vsrc\TestDriver.v line 28:6 mismatched input 'unsigned' expecting LPAREN
ERROR: L:\work\retrascope-riscv\src\main\verilog\rocket-chip\src\main\resources\vsrc\TestDriver.v line 31:4 missing KW_BEGIN at 'void'
ERROR: [Internal] null

The related Verilog code is as follows:
int unsigned rand_value;

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