Task #9310
substitute SMT-LIB variables those names are equal to builtin commands
Start date:
10/05/2018
Due date:
% Done:
100%
Estimated time:
Detected in build:
master
Published in build:
1.1.1-beta-190722
Description
Names for variables in HDL designs may be equal to builtin commands of SMT-LIB language (like "select").
When passing constraints to solver, such variables should change their names.
Related issues
History
Updated by Sergey Smolov almost 2 years ago
Updated by - Related to Bug #9309: ru.ispras.retrascope.engine.smv.testbench.sample.vcegar.VcegarPiBusAssertSmvTestbenchTestCase:line 2 column 34: invalid declaration, builtin symbol select added
Updated by Sergey Smolov almost 2 years ago
- % Done changed from 0 to 100
- Status changed from New to Resolved
Done in f4f5dda9
Updated by Sergey Smolov about 1 year ago
- Published in build set to 1.1.1-beta-190722
- Status changed from Verified to Closed