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Bug #9210

closed

java.lang.IllegalArgumentException at ru.ispras.fortress.expression.Nodes.bvextract(Nodes.java:322)

Added by Sergey Smolov over 6 years ago. Updated over 6 years ago.

Status:
Closed
Priority:
High
Assignee:
Alexander Kamkin
Target version:
0.1
Start date:
08/11/2018
Due date:
% Done:

0%

Estimated time:
Detected in build:
master
Platform:
Published in build:

Description

java.lang.IllegalArgumentException
    at ru.ispras.fortress.util.InvariantChecks.checkTrue(InvariantChecks.java:53)
    at ru.ispras.fortress.util.InvariantChecks.checkTrue(InvariantChecks.java:38)
    at ru.ispras.fortress.util.InvariantChecks.checkNotNull(InvariantChecks.java:95)
    at ru.ispras.fortress.expression.NodeOperation.<init>(NodeOperation.java:117)
    at ru.ispras.fortress.expression.NodeOperation.<init>(NodeOperation.java:70)
    at ru.ispras.fortress.expression.NodeOperation.<init>(NodeOperation.java:52)
    at ru.ispras.fortress.expression.Nodes.bvuge(Nodes.java:436)
    at ru.ispras.verilog.parser.model.basis.VerilogReference.getNode(VerilogReference.java:209)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_primary(VerilogTreeBuilder.java:6368)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_operation(VerilogTreeBuilder.java:6198)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_expression(VerilogTreeBuilder.java:6053)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_concatenation(VerilogTreeBuilder.java:7194)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_primary(VerilogTreeBuilder.java:6328)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_operation(VerilogTreeBuilder.java:6198)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_expression(VerilogTreeBuilder.java:6053)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_extended_expression(VerilogTreeBuilder.java:5328)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_assignment(VerilogTreeBuilder.java:5265)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_assign_statement(VerilogTreeBuilder.java:4283)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_statement(VerilogTreeBuilder.java:4020)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_case_statement_item(VerilogTreeBuilder.java:5506)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_case_statement(VerilogTreeBuilder.java:4828)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_statement(VerilogTreeBuilder.java:4090)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_block_statement(VerilogTreeBuilder.java:5164)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_statement(VerilogTreeBuilder.java:4110)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_procedure(VerilogTreeBuilder.java:3579)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_item(VerilogTreeBuilder.java:959)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_module(VerilogTreeBuilder.java:667)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_root(VerilogTreeBuilder.java:509)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.startRule(VerilogTreeBuilder.java:459)
    at ru.ispras.verilog.parser.VerilogFrontend.startBuilder(VerilogFrontend.java:251)
    at ru.ispras.verilog.parser.VerilogFrontend.startBuilder(VerilogFrontend.java:256)
    at ru.ispras.verilog.parser.VerilogFrontend.start(VerilogFrontend.java:271)
    at ru.ispras.verilog.parser.VerilogFrontend.start(VerilogFrontend.java:275)
    at ru.ispras.verilog.parser.VerilogTranslator.start(VerilogTranslator.java:162)
    at ru.ispras.verilog.parser.sample.VerilogPrinter.main(VerilogPrinter.java:45)
    at ru.ispras.verilog.parser.VerilogBenchmarkTest.runTest(VerilogBenchmarkTest.java:64)
    at ru.ispras.verilog.parser.VerilogBenchmarkTest.runTest(VerilogBenchmarkTest.java:50)

To reproduce the bug, run ru.ispras.verilog.parser.VerilogVisVerilog2SmvTestCase.runTest_Palu_palu test case.

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 #1

Updated by Sergey Smolov over 6 years ago

  • Subject changed from java.lang.IllegalArgumentException at ru.ispras.fortress.expression.Nodes.bvuge(Nodes.java:436) to java.lang.IllegalArgumentException at ru.ispras.fortress.expression.Nodes.bvextract(Nodes.java:322)
DEBUG: Include path: /home/ssedai/projects/veritrans/src/test/verilog/verilog2smv-vis-tests/Palu
DEBUG: Module name: palu
DEBUG: Including file '/home/ssedai/projects/veritrans/src/test/verilog/verilog2smv-vis-tests/Palu/palu.v' ...

java.lang.IllegalArgumentException
    at ru.ispras.fortress.util.InvariantChecks.checkTrue(InvariantChecks.java:53)
    at ru.ispras.fortress.util.InvariantChecks.checkTrue(InvariantChecks.java:38)
    at ru.ispras.fortress.util.InvariantChecks.checkNotNull(InvariantChecks.java:95)
    at ru.ispras.fortress.expression.NodeOperation.<init>(NodeOperation.java:118)
    at ru.ispras.fortress.expression.NodeOperation.<init>(NodeOperation.java:71)
    at ru.ispras.fortress.expression.NodeOperation.<init>(NodeOperation.java:53)
    at ru.ispras.fortress.expression.Nodes.bvextract(Nodes.java:322)
    at ru.ispras.verilog.parser.model.basis.VerilogReference.getNode(VerilogReference.java:205)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_primary(VerilogTreeBuilder.java:6374)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_operation(VerilogTreeBuilder.java:6204)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_expression(VerilogTreeBuilder.java:6059)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_concatenation(VerilogTreeBuilder.java:7200)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_primary(VerilogTreeBuilder.java:6334)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_operation(VerilogTreeBuilder.java:6204)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_expression(VerilogTreeBuilder.java:6059)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_extended_expression(VerilogTreeBuilder.java:5334)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_assignment(VerilogTreeBuilder.java:5271)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_assign_statement(VerilogTreeBuilder.java:4289)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_statement(VerilogTreeBuilder.java:4026)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_case_statement_item(VerilogTreeBuilder.java:5512)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_case_statement(VerilogTreeBuilder.java:4834)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_statement(VerilogTreeBuilder.java:4096)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_block_statement(VerilogTreeBuilder.java:5170)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_statement(VerilogTreeBuilder.java:4116)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_procedure(VerilogTreeBuilder.java:3585)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_item(VerilogTreeBuilder.java:965)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_module(VerilogTreeBuilder.java:673)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_root(VerilogTreeBuilder.java:515)
    at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.startRule(VerilogTreeBuilder.java:465)
    at ru.ispras.verilog.parser.VerilogFrontend.startBuilder(VerilogFrontend.java:250)
    at ru.ispras.verilog.parser.VerilogFrontend.startBuilder(VerilogFrontend.java:255)
    at ru.ispras.verilog.parser.VerilogFrontend.start(VerilogFrontend.java:270)
    at ru.ispras.verilog.parser.VerilogFrontend.start(VerilogFrontend.java:274)
    at ru.ispras.verilog.parser.VerilogTranslator.start(VerilogTranslator.java:169)
    at ru.ispras.verilog.parser.sample.VerilogPrinter.main(VerilogPrinter.java:45)
    at ru.ispras.verilog.parser.VerilogBenchmarkTest.runTest(VerilogBenchmarkTest.java:72)
    at ru.ispras.verilog.parser.VerilogBenchmarkTest.runTest(VerilogBenchmarkTest.java:58)
    at ru.ispras.verilog.parser.VerilogVisVerilog2SmvTestCase.runTest_Palu_palu(VerilogVisVerilog2SmvTestCase.java:100)
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 #2

Updated by Alexander Kamkin over 6 years ago

  • Status changed from New to Resolved
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 #3

Updated by Sergey Smolov over 6 years ago

  • Status changed from Resolved to Verified
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 #4

Updated by Sergey Smolov over 6 years ago

  • Status changed from Verified to Closed
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