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Bug #9172
closedTexas97ParsepackCfgGraphMlTestCase: ru.ispras.retrascope.basis.exception.RetrascopeException: Wrong range: 0 < 0 or 7 > 1.
Start date:
07/27/2018
Due date:
% Done:
100%
Estimated time:
Detected in build:
master
Platform:
Published in build:
Description
Wrong range: 0 < 0 or 7 > 1. ru.ispras.retrascope.basis.exception.RetrascopeException: Wrong range: 0 < 0 or 7 > 1. at ru.ispras.retrascope.model.basis.RangedVariable.checkParams(RangedVariable.java:290) at ru.ispras.retrascope.model.basis.RangedVariable.setRange(RangedVariable.java:168) at ru.ispras.retrascope.parser.verilog.VerilogCfgProcessBuilder.createAssignment(VerilogCfgProcessBuilder.java:302) at ru.ispras.retrascope.parser.verilog.VerilogCfgProcessBuilder.parseAssignment(VerilogCfgProcessBuilder.java:474) at ru.ispras.retrascope.parser.verilog.VerilogCfgProcessBuilder.onAssignStatementBegin(VerilogCfgProcessBuilder.java:619) at ru.ispras.verilog.parser.walker.VerilogNodeVisitor$3.onBegin(VerilogNodeVisitor.java:265) at ru.ispras.verilog.parser.walker.VerilogNodeVisitor.onBegin(VerilogNodeVisitor.java:700) at ru.ispras.verilog.parser.core.TreeWalker.onBegin(TreeWalker.java:100) at ru.ispras.verilog.parser.core.TreeWalker.start(TreeWalker.java:85) at ru.ispras.retrascope.parser.verilog.VerilogCfgBuilder.start(VerilogCfgBuilder.java:87) at ru.ispras.verilog.parser.VerilogDesignBackends.start(VerilogDesignBackends.java:56) at ru.ispras.verilog.parser.VerilogTranslator.start(VerilogTranslator.java:169) at ru.ispras.retrascope.parser.verilog.VerilogParser.parse(VerilogParser.java:103) at ru.ispras.retrascope.parser.basis.HdlParser.start(HdlParser.java:112) at ru.ispras.retrascope.basis.Engine.start(Engine.java:217) at ru.ispras.retrascope.basis.ToolChain.start(ToolChain.java:111) at ru.ispras.retrascope.basis.Engine.start(Engine.java:217) at ru.ispras.retrascope.Retrascope$ToolRun.start(Retrascope.java:215) at ru.ispras.retrascope.Retrascope.main(Retrascope.java:456) at ru.ispras.retrascope.Retrascope.main(Retrascope.java:373) at ru.ispras.retrascope.util.ToolTest.runTest(ToolTest.java:81) at ru.ispras.retrascope.basis.SingleTest.runTest(SingleTest.java:99) at ru.ispras.retrascope.engine.cfg.printer.graphml.sample.texas97.Texas97CfgGraphMlSingleTest.runTest(Texas97CfgGraphMlSingleTest.java:44)
Updated by Sergey Smolov over 6 years ago
- Related to Bug #9173: Incorrect DataType: BIT_VECTOR(1) instead of BIT_VECTOR(40) added
Updated by Sergey Smolov over 6 years ago
The same error appears in ru.ispras.retrascope.engine.cfg.printer.graphml.sample.texas97.Texas97ParsesysCfgGraphMlTestCase
Updated by Sergey Smolov over 6 years ago
The same error appears in ru.ispras.retrascope.engine.cfg.printer.graphml.sample.texas97.Texas97Test2CfgGraphMlTestCase
Updated by Sergey Smolov over 6 years ago
- Status changed from New to Resolved
- % Done changed from 0 to 100
The error has been fixed in Verilog Translator.
Updated by Sergey Smolov over 6 years ago
- Status changed from Resolved to Closed
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