https://forge.ispras.ru/https://forge.ispras.ru/favicon.ico?16490126692018-03-27T09:00:27ZOpen-Source ProjectsVerilog Translator - Bug #8779: mips16/data_mem.v: wrong type for define-containing declaration of 'ram_addr' wirehttps://forge.ispras.ru/issues/8779?journal_id=326732018-03-27T09:00:27ZSergey Smolovsmolov@ispras.ru
<ul><li><strong>Subject</strong> changed from <i>mips16/data_mem.v: wrong right-hand side expression in assignment</i> to <i>mips16/data_mem.v: wrong type for define-containing declaration of 'ram_addr' wire</i></li></ul> Verilog Translator - Bug #8779: mips16/data_mem.v: wrong type for define-containing declaration of 'ram_addr' wirehttps://forge.ispras.ru/issues/8779?journal_id=326762018-03-27T10:45:19ZAlexander Kamkinaskamkin@gmail.com
<ul><li><strong>Status</strong> changed from <i>New</i> to <i>Resolved</i></li></ul> Verilog Translator - Bug #8779: mips16/data_mem.v: wrong type for define-containing declaration of 'ram_addr' wirehttps://forge.ispras.ru/issues/8779?journal_id=327172018-04-09T11:14:36ZAlexander Kamkinaskamkin@gmail.com
<ul><li><strong>Status</strong> changed from <i>Resolved</i> to <i>Closed</i></li></ul>