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Task #8191

Some Aarch64 registers disassemble

Added by Sergey Smolov 7 months ago. Updated 7 months ago.

Status:
Closed
Priority:
Normal
Assignee:
Category:
QEMU core
Target version:
Start date:
05/04/2017
Due date:
% Done:

100%

Estimated time:
Detected in build:
ispras.armv8.edition
Published in build:
0.1.6-beta-170504

Description

ELR_EL3
SPSR_EL3
SPSR_EL1
DLR_EL0
CPACR_EL1
MPIDR_EL1
PAR_EL1
TCR_EL1
TCR_EL2
VTTBR_EL2
VTCR_EL2
HCR_EL2

History

#1 Updated by Sergey Smolov 7 months ago

  • Status changed from New to Open

DLR_EL0, MPIDR_EL1 registers seem to be skipped.

#2 Updated by Sergey Smolov 7 months ago

Fixup: TTBR0_EL2, DLR_EL0, MPIDR_EL1 disassembling should be also performed.

#3 Updated by Sergey Smolov 7 months ago

  • Status changed from Open to Resolved
  • % Done changed from 0 to 100

Done in 3a449485

#4 Updated by Sergey Smolov 7 months ago

  • Subject changed from implement some Aarch64 registers & logging for them to Some Aarch64 registers disassemble
  • Status changed from Resolved to Verified

#5 Updated by Sergey Smolov 7 months ago

  • Status changed from Verified to Closed
  • Published in build set to 0.1.6-beta-170504

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